Quadrature rejection circuit using biased diode bridge

• US 3,244,987 A
• Filed: 03/15/1963
• Issued: 04/05/1966
• Est. Priority Date: 03/15/1963
• Status: Expired due to Term

• Current Assignee: Frank Prapis, Gunter J. Gessner
• Original Assignee: Frank Prapis, Gunter J. Gessner
• Inventors: FRANK PRAPIS, Gessner, Gunter J.
• Application Number:
  US04/265,472
• Time in Patent Office: 1,117 Days
• US Class Current: 327/551
• CPC Class Codes: G01N 23/205 using diffraction cameras
• CPC Class Codes: H03D 1/22 Homodyne or synchrodyne circuits receiver circuits H04B1/30

Claims

1. A GATE CIRCUIT HAVING AN INPUT AND AN OUTPUT, MEANS FOR PROVIDING ALTERNATING CURRENT SIGNALS WITH A DESIRED PHASE COMPONENT AND A QUADRATURE VOLTAGE CONNECTED TO THE INPUT, A BRIDGE CIRCUIT HAVING FOUR DIODES AND A TERMINAL BETWEEN EACH PAIR OF DIODES, THE INPUT AND THE OUTPUT BEING CONNECTED IN SERIES DIRECTLY TO TWO OPPOSING TERMINALS OF THE BRIDGE CIRCUIT, MEANS FOR PROVIDING A FULL WAVE RECTIFIED SINUSOIDAL VOLTAGE AND A SUBSTANTIALLY CONSTANT UNIDIRECTIONAL VOLTAGE CONNECTED ACROSS THE OTHER TWO OPPOSING TERMINALS OF THE BRIDGE CIRCUIT TO PERIODICALLY RENDER THE DIODES CONDUCTING WHEN THE CONSTANT UNDIRECTIONAL VOLTAGE EXCEEDS THE RECTIFIED SINUSODIAL VOLTAGE AND TIMED TO RENDER THE DIODES CONDUCTING WHEN THE DESIRED PHASE COMPONENT IS A MAXIUM AND THE QUADRATURE VOLTAGE IS A MINIUM TO PASS THE DESIRED PHASE COMPONENT OF THE SIGNALS AND REJECT THE QUADRATURE VOLTAGE.