Pattern recognition systems using digital logic

• US 3,275,985 A
• Filed: 06/14/1962
• Issued: 09/27/1966
• Est. Priority Date: 06/14/1962
• Status: Expired due to Term

• Current Assignee: Curt F. Fey, Donald F. Smith, Laveen N. Lanal, William H. Dunn, William L. Mcdermid
• Original Assignee: Curt F. Fey, Donald F. Smith, Laveen N. Lanal, William H. Dunn, William L. Mcdermid
• Inventors: Dunn, William H., Fey, Curt F., Lanal, Laveen N., Mcdermid, William L., Smith, Donald F.
• Application Number:
  US04/202,525
• Time in Patent Office: 1,566 Days
• US Class Current: 382/158
• CPC Class Codes: G06V 30/194 References adjustable by an adaptive method, e.g. learning

Claims

1. A PATTERN RECOGNITION SYSTEM COMPRISING A PLURALITY OF SENSING ELEMENTS FOR OBSERVING THE ELEMENTS OF A PATTERN, A PLURALITY OF GROUPS OF WEIGHT STORES, AN ADDER, MEANS FOR SUCCESSIVELY GATING THE WEIGHT CONTENTS OF THE STORES OF THE GROUPS OF STORES TO SAID ADDER, A REGISTER FOR RECEIVING THE SUMMATION QUANTITY OF EACH ADDITION, A FIRST AND SECOND THRESHOLD NUMBER GENERATOR, A COMPARATOR, MEANS FOR COUPLING SAID COMPARATOR TO SAID REGISTER AND TO SAID THRESHOLD GERERATORS FOR SUCCESSIVELY COMPARING THE CONTENTS OF SAID REGISTER WITH A FIRST AND SECOND THRESHOLD NUMBER, A PLURALTIY OF OUTPUT LINES, MEANS FOR COUPLING SAID LINES SUCCESSIVELY TO SAID REGISTER FOR READING OUT A LOGICAL 1 OR 0 DEPENDING, RESPECTIVELY, ON WHETHER THE CONTENTS OF SAID REGISTER IS GREATER THEN 0 FOR PRODUCING ON SAID OUTPUT LINES A BINARY OUTPUT NUMBER TO IDENTIFY EACH PATTERN, AND LOGICAL CIRCUIT MEANS COUPLED TO SAID COMPARATOR FOR INDICATING WHEN THE NUMERICAL CONTENT OF SAID REGISTER IS INTERMEDIATE THE NUMERICAL CONTENT OF SAID FIRST AND SECOND THRESHOLD NUMBER.