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COMPUTER MEMORY PROTECTION

  • US 3,573,855 A
  • Filed: 12/31/1968
  • Issued: 04/06/1971
  • Est. Priority Date: 12/31/1968
  • Status: Expired due to Term
First Claim
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1. Processor means including a memory to provide memory bounds protection for data to be read, data to be written and instructions to be fetched for execution from a memory which comprises:

  • a. an upper bounds and lower bounds register pair to store upper and lower memory addresses for each of read, write and execute memory storage addresses;

    b. a source of memory request words including ID code bits, memory address bits and accommodation for data bits;

    c. bounds comparators, one connected to each said pair of bounds registers for comparing said memory address bits with the upper and lower memory addresses of the connected upper and lower bounds register pair;

    d. decode logic responsive to said ID code bits to select one of said bounds comparators; and

    e. means responsive to the selected bound comparator to apply an enable bit to said memory if said memory address bits satisfy the selected comparator.

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