REDUCED FORWARD VOLTAGE DROP RECTIFYING CIRCUIT
First Claim
1. A transistor rectifying circuit for an alternating current signal, including in combination, first and second terminals for receiving the alternating current signal, a first transistor having a collector electrode directly connected to said first terminal, an emitter electrode directly connected to said second terminal and a base electrode, bias circuit means directly connected between said first and second terminals and further coupled to said base electrode of said first transistor, said bias circuit means being responsive to the alternating current signal to develop a bias signal therefrom and apply the same to said base electrode, said bias signal being of greater magnitude than the alternating current signal at said collector and emitter electrodes during one-half cycle of the alternating current signal whereby said transistor is biased to saturation.
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Abstract
A dynamic rectifying device uses a transistor biased to saturation as the rectifying element. The lower voltage drop between collector and emitter of a saturated transistor (as compared with the diode voltage drop) provides increased rectifying efficiency and better clamping action. The circuit includes a bias network using the input alternating current signal to develop the proper bias voltage for the circuit.
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Citations
5 Claims
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1. A transistor rectifying circuit for an alternating current signal, including in combination, first and second terminals for receiving the alternating current signal, a first transistor having a collector electrode directly connected to said first terminal, an emitter electrode directly connected to said second terminal and a base electrode, bias circuit means directly connected between said first and second terminals and further coupled to said base electrode of said first transistor, said bias circuit means being responsive to the alternating current signal to develop a bias signal therefrom and apply the same to said base electrode, said bias signal being of greater magnitude than the alternating current signal at said collector and emitter electrodes during one-half cycle of the alternating current signal whereby said transistor is biased to saturation.
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2. The transistor rectifying circuit of claim 1 wherein, said bias circuit means include a transformer having a first winding portion Coupled between said first and second terminals and a second winding portion coupled to said base electrode.
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3. The transistor rectifying circuit of claim 2 wherein, said transformer includes a terminal common to said first and second winding portion, said first winding portion includes a first transformer terminal and said second winding portion includes a second transformer terminal, said common transformer terminal being connected to said first terminal, capacitance means connecting said first transformer terminal to said second terminal, and resistance means connecting said second transformer terminal to said base electrode.
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4. The transistor rectifying circuit of claim 1 wherein, said bias circuit means includes, capacitor means and diode means connected in series between said first and second terminals, a second transistor having an emitter electrode connected to the junction of said capacitor means and said diode means, a base electrode coupled to to the other side of said diode means and a collector electrode connected to said base electrode of said first transistor, said second transistor being of the polarity type opposite to that of said first transistor, said diode means being poled opposite to the base-emitter diode polarity of said second transistor,
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5. A bridge rectifier circuit for an alternating current signal, including in combination, four bridge rectifier terminals, four transistor rectifying circuits each connected to pairs of said bridge rectifier circuit, each of said transistor rectifying circuits including first and second terminals, a first transistor having a collector electrode directly connected to said first terminal, an emitter electrode directly connected to said second terminal and a base electrode, bias circuit means including capacitor means and diode means connected in series between said first and second terminals, a second transistor having an emitter electrode connected to the junction of said capacitor means and said diode means, a base electrode coupled to the other side of said diode means and a collector electrode connected to said base electrode of said first transistor, said second transistor being of the polarity type opposite to that of said first transistor, said diode means being poled opposite to the base-emitter diode polarity of said second transistor.
Specification