SOLID-STATE TRAFFIC CONTROLLER

• US 3,594,720 A
• Filed: 01/31/1968
• Issued: 07/20/1971
• Est. Priority Date: 01/31/1968
• Status: Expired due to Term

• Current Assignee: Philip Cane
• Original Assignee: Philip Cane
• Inventors: Cane, Philip
• Application Number:
  US04/702,012
• Time in Patent Office: 1,266 Days
• US Class Current: 340/925
• CPC Class Codes: G08G 1/08 according to detected number or speed of vehicles
• CPC Class Codes: G08G 1/082 Controlling the time between beginning of the same phase of a cycle at adjacent intersections

Abstract

A controller for traffic lights employing solid-state components and providing both vehicular and pedestrian control. Cross street controls initiate operation of a binary counter sequentially to operate signal lights through predetermined time intervals. Interconnecting circuits provide for coordination with other signal lights, vehicle extension intervals, recall and resetting controls. An auxiliary memory circuit operates to distinguish between vehicle only and pedestrian operation.

Claims

1. In a traffic signal controller apparatus comprising, a plurality of bistable stages cascaded to form a binary counter, an additional bistable means for providing a walk signal representative of pedestrian selection of a walk traffic condition signalling a safe street crossing interval for pedestrians, means for selectively advancing the count in said binary counter to establish a sequence of different states of said binary counter binary stages, and decoding means responsive to each state of said binary counter binary stages for establishing at least first and second traffic flow conditions, said decoding means comprising at least in part, first circuit and gating means responsive to more than one stage of said binary counter and the absence of a walk signal for establishing a first traffic flow condition permitting a safe street crossing interval for vehicles, and second circuit and gating means responsive to more than one stage of said binary counter and to the presence of a walk signal from said additional bistable means for establishing a second traffic flow condition permitting a safe street crossing interval for pedestrians.

2. Apparatus as set forth in claim 1 wherein said means for selectively advancing the count in said binary counter comprises means for causing said binary counter to step through a first group of counts common to both said first and second traffic flow conditions, said decoding means including means for establishing a first portion of the traffic flow condition wherein traffic movement on a first street stops upon reaching the last count of said first group of counts.

3. Apparatus as set forth in claim 2 and further comprising means for causing said binary counter to skip at least one count after said binary counter reaches the last count of said first group of counts.

4. Apparatus as set forth in claim 3 and further comprising means for causing said binary counter to step through a second group of counts after said binary counter has skipped said at least one count, said decoding means including means for establishing a second portion of said first traffic flow wherein traffic crossing of said first street is permitted upon reaching the first count of said second group of counts of said binary counter.

5. Apparatus as set forth in claim 3 and further comprising means for causing said binary counter to step through a second group of counts after said binary counter has skipped said at least one count, said decoding means including means for establishing a second portion of said second traffic flow condition wherein pedestrian crossing of said first street is permitted upon reaching the first count of said second group of counts of said binary counter.

6. In a traffic signal controller apparatus comprising, a binary counter having a plurality of bistable stages and at least one input count line, timing circuitry means coupled to said count line for selectively advancing the count in said binary counter to establish a sequence of different states, decoding means responsive to each state of said binary counter for establishing at least a first traffic flow condition permitting at least vehicle crosSing of a first street and a second traffic flow condition permitting at least pedestrian crossing of said first street, and bistable pedestrian memory means including pedestrian actuable call means and having a first state assumed when a pedestrian call is received and a second state assumed in the absence of a pedestrian call, said decoding means comprising at least in part, first circuit and gating means responsive to at least some of said binary counter stages and the absence of a call condition of said bistable pedestrian memory means for establishing said first traffic flow condition, and second circuit and gating means responsive to at least some of said binary counter stages and a call condition of said bistable pedestrian memory means for establishing said second traffic flow condition.

7. Apparatus as set forth in claim 6 wherein said first circuit gating means comprises an AND gate having a plurality of inputs coupled from at least some of said binary counter stages and a single input coupled from a second state output of said bistable pedestrian memory means.

8. Apparatus as set forth in claim 6 wherein said second circuit gating means comprises a pair of AND gates each having a plurality of differently arranged inputs coupled from at least some of said binary counter stages and a single input coupled from a first state output of said bistable pedestrian memory, said pair of AND gates further having separate outputs for providing WALK and PEDESTRIAN CLEARANCE intervals, respectively, to permit pedestrian crossing of said first street.

9. Apparatus as set forth in claim 1 wherein said means for selectively advancing the count in said binary counter comprises means for causing said binary counter to step through first and second groups of counts, said decoding means comprising third and fourth circuit gating means each responsive to like stages of said binary counter wherein said like stages number less than the total number of stages of said binary counter, said third circuit gating means responsive to a first condition of said like stages wherein traffic movement on at least a first street stops upon reaching the last count of said first group of counts, said fourth circuit gating means responsive to a second condition of said like stages of said binary counter wherein traffic movement on at least a second street stops upon reaching the last count of said second group of counts.