TRANSFORMERLESS POWER SUPPLY

• US 3,602,795 A
• Filed: 10/16/1969
• Issued: 08/31/1971
• Est. Priority Date: 10/16/1969
• Status: Expired due to Term

• Current Assignee: John B. Gunn
• Original Assignee: John B. Gunn
• Inventors: Gunn, John B.
• Primary Examiner(s): Shoop, Jr., William M.
• Application Number:
  US04/866,929
• Time in Patent Office: 684 Days
• Field of Search: 321/15,2
• US Class Current: 363/62
• CPC Class Codes: H02M 7/25 arranged for operation in series, e.g. for multiplication of voltage

Abstract

The power supply circuit receives as an input an AC line voltage, rectifies the line voltage to DC and transforms the voltage downwardly to a much lower level. No transformer is employed but rather the power supply circuit includes a plurality of capacitors which are charged in series by the line voltage and discharged in parallel across the load. The charging and discharging is controlled by a diode and transistor connected to each capacitor and to each other so that the diode conducts during the charging and then maintains the transistor nonconductive and the transistor conducts during the discharge when the diode is nonconductive.

Claims

1. In a system including means for converting a high voltage input at a pair of input terminals to a lower voltage output at a pair of output terminals, a circuit comprising;

a. a plurality of stages each including a capacitor and first and second current control elements said first and second control elements being a diode and a transistor, respectively, b. the first current control element and capacitor for each stage being connected together in series in a first circuit for each stage and the first circuits for all the stages being connected together in series in a charging circuit between said input terminals, c. the second current control element and capacitor for each stage being connected in series in a second circuit for each stage and all of said second circuits being connected in parallel in a discharging circuit between said first and second output terminals, d. and said first and second current control elements in each of said stages being interconnected so that when one is conducting the other is nonconducting said diode for each stage being connected between the base and emitter of the transistor for that stage to bias the transistor off when the diode is conducting.

2. The system of claim 1 wherein each stage includes a second transistor connected in the second circuit for each stage in series with capacitor and first named transistor for the stage.

3. The system of claim 2 wherein the said diode of each stage is connected between the emitter and base of the second transistor of the next stage.

4. The system of claim 3 wherein each stage includes an additional transistor connected to the first named transistor for controlling said first named transistor.

5. The system of claim 1 wherein said high voltage input is an AC input and said system includes two of said circuits each for converting one half-wave of the input voltage to a low voltage DC output.

6. A circuit for converting a high voltage AC input at a pair of input terminals to a lower voltage DC output at a pair of output terminals comprising:

a. a plurality of stages each including a capacitor, a diode and a transistor, b. the diode and capacitor for each stage being connected in series between first and second terminals in a first circuit for each stage and said first and second terminals and said first circuits for all the stages being connected in series between said input terminals, c. the transistor and capacitor for each stage being connected in series between third and fourth terminals in a second circuit for each stage and all of said third and fourth terminals and said second circuits being connected in parallel between said output terminals, d. and the transistor and diode in each stage being interconnected so that when one is conducting the other is nonconducting said transistor for each stage including a control input for controlling current flow between first and second terminals of the transistor, the control input in each stage being coupled to one side of the diode for that stage and the other side of the diode being coupled to one of said terminals of the transistor.

7. The circuit of claim 6 wherein said coupling between said one terminal of said transistor and said diode for each stage is made by a connection at a point in the first series circuit for the stage between the diode and the capacitor for that stage.

8. The circuit of claim 6 wherein the control element of said transistor for each stage is coupled to one side of said diode for that stage by a circuit including another transistor having a control input for controlling current flow between first and second current terminals for the transistor.

9. The circuit of claim 8 wherein said another transistor for each stage has one of its terminals connected to a fifth terminal for the stage and fifth terminals for the stages are connected to a voltage regulation bus for the circuit.

10. The circuit of claim 6 wherein said second circuit between said third and fourth terminals for each stage include in series with said capacitor and transistor a further transistor.

11. The circuit of claim 10 wherein said further transistor for each stage includes a control input connected to a junction between the diode and capacitor in the first circuit for the next stage. 12 The circuit of Claim 6 wherein said circuit includes a first stage, a last stage and at least one stage between said first and last stages, and said first stage includes additional diodes in the circuit coupling the diode of that stage to the transistor for that stage.

13. A circuit for converting a high voltage input at a pair of input terminals to a lower voltage DC output at a pair of output terminals comprising:

an AC source, a plurality of stages each including at least a capacitor, means connected to said plurality of stages for charging the capacitors in series for a time during each cycle of said AC source which is less than one-half of the period of said AC source and for discharging the capacitor in parallel for a time which is greater than one-half the period of said AC source.

14. The system of claim 13 including means coupled to said circuits for regulating the output voltage applied to said load.