METHOD OF AND A SYSTEM FOR THE AUTOMATIC ANALYSIS OF HEART DISTURBANCES

• US 3,618,593 A
• Filed: 11/21/1968
• Issued: 11/09/1971
• Est. Priority Date: 09/02/1968
• Status: Expired due to Term

• Current Assignee: Choudomir Kirilov Nachev, Garo Bohos Astardjian, Hristo Radey Hristov, Kiril Kirilov Boev
• Original Assignee: Choudomir Kirilov Nachev, Garo Bohos Astardjian, Hristo Radey Hristov, Kiril Kirilov Boev
• Inventors: Nachev, Choudomir Kirilov, Astardjian, Garo Bohos, Hristov, Hristo Radey, Boev, Kiril Kirilov
• Primary Examiner(s): Kamm, William E.
• Application Number:
  US04/777,575
• Time in Patent Office: 1,083 Days
• Field of Search: 128/2.5P,2.5S,2.6A
• US Class Current: 600/515
• CPC Class Codes: A61B 5/0245 by using sensing means generating electric signals, i.e. ECG signals

Abstract

A device or system for automatically analyzing disturbances of heart rhythm and a method of such analysis wherein a sequence of cardiac waves, e.g. as generated by a transducer attached to the body of a patient is converted into normal pulses occurring within predetermined time intervals following a preceding pulse. The disturbance is characterized by delayed pulses occurring at a greater time interval for accelerated pulses with a shorter interval. Information is stored in a memory in the form of sequences of such pulses representing various cardiac conditions and and a contemporary condition is compared with the stored information to produce output signals indicating the condition.

Claims

1. A method of automatically analyzing disturbances of the rhythm of the heart, comprising the steps of:

automatically analyzing a sequence of cardiac R-waves and converting same into normal pulses occurring within a predetermined time interval following a preceding pulse, delayed pulses occurring at a time interval greater than said predetermined time interval after the preceding pulse and accelerated pulses occurring at a time interval less than the predetermined time interval after the preceding pulse;

storing information representing a multiplicity of cardiac conditions in the form of sequences of said pulses;

comparing a current pulse train of such pulses with the stored information and generating a respective output signal upon the coincidence of the current pulse train with a corresponding pulse sequence of the stored information representing an indication of the corresponding condition; and

counting the incidences of the output signals of the respective condition.

2. A system for the automatic analysis of the disturbances of the rhythm of the heart, comprising:

sensing means for producing an electrical wave representing the function of the heart of a biological subject;

amplifier means connected with said sensor means and producing a pulse train representing said wave;

logic-circuit means for classifying the pulses of said train into normal pulses occurring within a predetermined time interval following a preceding pulse, delayed pulses occurrIng at a predetermined time interval greater than said predetermined time interval after the preceding pulse and accelerated pulses occurring at a time interval less than the predetermined time interval after the preceding pulse;

analyzer means including a memory registering a multiplicity of sequences of the normal, delayed and accelerated pulses representing respective cardiac conditions, and means connected with said logic circuit, means for producing a respective output signal upon coincidence of the pulse sequence derived from said logic circuit means with one of the pulse sequences registered in said memory; and

means for counting the output pulses associated with the respective conditions.

3. The system defined in claim 2 wherein said logic circuit means comprises:

a pair of first monostable circuits;

a first AND-gate receiving an input from said amplifier means and having an output connected to said pair of first monostable circuits;

a respective time-determining potentiometer in each of said first monostable circuits representing the predetermined time interval;

a pair of further monostable circuits each connected to one of said potentiometers and with a respective one of said first monostable circuits;

respective OR gates connected to and energized by the outputs of the monostable circuits provided with the respective potentiometer;

a first and second NOT gate; and

three further AND-gates all of said further AND-gates receiving input pulses forming the input to said first AND-gate, one of said further AND-gates receiving the output of one of said OR gates through said first NOT gate and the output of the other OR gate directly, another of said further AND-gates receiving an input from said first NOT gate and from said other OR gate through said second NOT gate, the third further AND gate receiving input signals from both said OR gates directly, the output of one of said NOT gates forming an input to said first AND gate.

4. The system defined in claim 3 wherein said analyzing means comprises:

a set of OR gates;

a bank of set-reset flip-flops forming said memory;

a diode matrix having one array of conductors connected to the outputs of said flip-flops and other conductors of said array connected to the outputs of said further AND gates directly and via OR gates of said set having the outputs of said further AND gates as inputs; and

another array of conductors, some of said conductors of said other array being connected through respective OR gates of said set to the inputs of said flip-flops and other conductors of said other array being connected to said counting means.