ADAPTIVE DELTA MODULATION SYSTEM

• US 3,628,148 A
• Filed: 12/23/1969
• Issued: 12/14/1971
• Est. Priority Date: 12/23/1969
• Status: Expired due to Term

• Current Assignee: Stephen J. Brolin
• Original Assignee: Stephen J. Brolin
• Inventors: Brolin, Stephen J.
• Application Number:
  US04/887,657
• Time in Patent Office: 721 Days
• US Class Current: 375/251
• CPC Class Codes: H03M 3/022 with adaptable step size, e.g. adaptive delta modulation [ADM]

Abstract

An adaptive delta modulation system is characterized by an encoder algorithm having a plurality of unique states. A combinational circuit receives a feedback signal from the transmitted signal and a state signal on the basis of which a step of a size dependent upon the state and the transmission is applied to the integrator by the combinational circuit, which also generates a new state signal.

Claims

1. In an adaptive delta modulation signal transmission system wherein analog and digital signals are used at different points in the system, an encoder for encoding analog signals as digital signals to be transmitted, the algorithm of the encoding process being characterized by a plurality of unique states of the encoder, a comparator circuit to which the analog signals are applied, means for periodically transmitting the comparator output in digital pulse form, first means responsive to each periodic transmission and to a digital signal indicative of the state of the encoder for producing a step pulse output of a step size and polarity which is a function of the state of the encoder and of the periodic transmission, an integrator for receiving the output of said first means, the output of said integrator being applied to said comparator, said first means further producing a digital signal indicative of the new state of said encoder, storage means for storing the digital signal indicative of the state, and means for applying the stored signal to said first means simultaneously with the next succeeding periodic transmission of said encoder.

2. An encoder as claimed in claim 1 and further including second means to which the output of said storage means is applied for varying the decision level of said comparator in accordance with the state of the encoder.

3. An encoder as claimed in claim 1 and further including means to which the analog signals are applied for altering the waveform of the analog signals applied to said comparator to reduce slope overload noise.

4. An encoder as claimed in claim 3 wherein said last-mentioned means comprises a circuit for delaying a portion of the analog signal and combining it with an undelayed portion, and applying the combined signals to said comparator.

5. An adaptive delta modulation system comprising an encoder for converting analog signals to digital signals for transmission, and a decoder for converting received digital signals to analog signals, said encoder being characterized by an algorithm having a plurality of unique states, each state having a decision level associated therewith, said encoder comprising an integrator circuit, means for comparing analog signals with the output of said comparator circuit, means for transmitting at fixed time intervals a digital signal based on the comparator output, first means for receiving each successive signal transmitted and producing an output indicative of the nature of said signal, second means for receiving the output of said first means, third means for applying to said second means simultaneously with the output of said first means a signal indicative of the state of said encoder, said second means, upon receiving said signals generating a step input to said integrator, the size of said step being a function of the state of the encoder and the output of said first means, and simultaneously generating a new state signal, and storage means for storing the new state signal until the next signal transmission;

said decoder cOmprising fourth means for receiving digital signals and producing an output indicative of the nature of said signals, fifth means for receiving the output of said fourth means, sixth means for applying to said fifth means simultaneously with the output of said fourth means a signal indicative of the state of said decoder, said fourth means, upon receiving said signals generating a step output, the size of said step being a function of the state of the encoder and the output of said fourth means, and simultaneously generating a new state signal, an integrator for receiving the step output, storage means for receiving the state signal and a low-pass filter for receiving the output of said integrator.

6. An adaptive delta modulation system as claimed in claim 5 and further including means at the encoder to which the output of said storage means is applied for varying the decision level of said comparator as a function of the state of the encoder.