DIGITAL SINE WAVE GENERATOR

• US 3,657,657 A
• Filed: 08/03/1970
• Issued: 04/18/1972
• Est. Priority Date: 08/03/1970
• Status: Expired due to Term

• Current Assignee: William T. Jefferson
• Original Assignee: William T. Jefferson
• Inventors: Jefferson, William T.
• Primary Examiner(s): Miller, Jr., Stanley D.
• Application Number:
  US05/060,266
• Time in Patent Office: 624 Days
• Field of Search: 307/223,220,227,229,261 328/13,14,27,186 235/150.53,159,186,197
• US Class Current: 327/117
• CPC Class Codes: G06F 1/035 Reduction of table size G06F1/0314 takes precedence
• CPC Class Codes: G06F 2101/04 Trigonometric functions
• CPC Class Codes: G06G 7/22 for evaluating trigonometric functions; for conversion of co-ordinates; for computations involving vector quantities trigonometric computations using simultaneous equations G06G7/34 for computations in the complex plane; G06G7/20, G06G7/28 take precedence
• CPC Class Codes: G06G 7/28 for synthesising functions by piecewise approximation
• CPC Class Codes: H03K 4/026 using digital techniques
• CPC Class Codes: H04L 27/122 using digital generation of carrier signals digital function generators G06F1/02, H04L17/10; generating pulses having stepped portions using digital techniques H03K4/026

Abstract

An accurate source of constant frequency pulses drives an adjustable modulus digital divider, which divides the input pulse repetition rate by exact integers. The pulse repetition rate of the output of the divider is made directly proportional to the desired frequency of a sine wave that is to be generated. The output of the divider continuously clocks a four-bit binary updown counter from the all-zero condition to the all-one condition and then back down cyclically. This up-down counter programs a digital sine wave decoder in which logic circuits convert the binary pattern from the output of the up-down counter into a binary pattern that is a stepwise approximation to a sine wave. A conventional digital-to-analog converter converts the binary pattern from the sine wave decoder into a corresponding analog signal, which is filtered to remove undesirable frequency components. The result is a reasonably pure sine wave whose frequency is accurately controlled by the pulse repetition rate from the variable modulus divider.

Claims

1. A digital waveform generator comprising means for generating a serial pulse train, counting means for receiving said serial pulse train and continuously counting pulses in said pulse train in a uniform cycle, and for providing a first binary coded output corresponding to said count, and code conversion means receiving only said first binary coded output and connected to said means for generating only through said counting means for modifying said output to provide a second binary coded output approxImating a trigonometric function.

2. The generator of claim 1 wherein the trigonometric function approximated by said code conversation means is a sine.

3. The generator of claim 2 having a digital-to-analog converter receiving the sine approximation from said code conversation and filter means fed by the output from said converter for smoothing said sine approximation to a smooth sine wave.

4. The generator of claim 2 wherein said means for generating a serial pulse train comprises oscillator means for generating a stable frequency, and a modulo-X divider means for dividing said stable frequency by a predetermined number to provide a serial pulse train having a repetition rate dependent on said predetermined number.

5. The generator of claim 4 further comprising, digital-to-analog converter means receiving said binary coded output from the code conversion means to provide an analog signal in response to the second binary coded output.

6. The generator of claim 5 wherein said counting means provides a 4-bit binary coded output to said conversion means on four parallel lines which is continuously and cyclicly varying from a decimal value of 0 to 15 to 0, and wherein said conversion means modifies said binary coded output by providing a 4-bit, 4 line parallel binary coded converted output having its least significant bit corresponding to the second least significant bit of the counter means output, its most significant bit corresponding to the most significant bit of the counter means output, its second most significant bit corresponding to ADB + CD + AC + BC, and its second least significant bit corresponding to ABC + ABD + ABC + ABD, where D,C,B, and A are the outputs of the counter means in descending order of significance and the operations are those of Boolean algebra.

7. The generator of claim 1 wherein said counting means provides a 4-bit binary coded output on four parallel lines, said output continuously and cyclicly varying from a decimal value of 0 to 15 to 0, and wherein said conversation means modifies said binary coded output by providing a 4-bit, 4 line parallel binary coded output having its least significant bit corresponding to the second least significant bit of the the counter means output, its most significant bit corresponding to the most significant bit of the counter means output, its second most significant bit corresponding to ABD + CD + AC + BC and its second least significant bit corresponding to ABC + ABD + ABC + ABD, where D, C,B, and A are the outputs of the counter means in descending order of significance and the operations are those of Boolean algebra.

8. A digital sine wave generator, including in combination:

oscillator means for generating a stable base frequency, a modulo-X divider receiving the output of said oscillator means and dividing it by a selected integer, a four-bit binary up-down counter receiving the output from said divider, up-down control means also receiving the output from said divider for reversing said up-down counter at each end of its counting cycle to keep it continuously counting up then down then up and so on, four-bit binary sine-wave decoder means receiving as its sole input the output from said counter and providing a four-bit binary coded output, a four-bit binary digital-to-analog converter receiving the output from said decoder means and providing a sine wave approximation as its output, and filter means receiving the output from said converter and smoothing it to a true sine wave.

9. The generator of claim 8 wherein said decoder means provides a direct 20 output without gates, a direct 23 output without gates, a 21 output through four AND gates feeding through one OR gate, and a 22 output through four AND gates feeding through one OR gate.

10. The generator of claim 8 wherein said control means comprises two four-input AND gates, each connected to half of the outputs from said counter, and a J-K flip flop connected to the output from said AND gates and connected to said counter by a control line.