FAIL-SAFE VEHICLE DETECTOR SYSTEM

• US 3,662,330 A
• Filed: 01/18/1971
• Issued: 05/09/1972
• Est. Priority Date: 01/18/1971
• Status: Expired due to Term

• Current Assignee: Gary L. Meredith
• Original Assignee: Gary L. Meredith
• Inventors: Meredith, Gary L.
• Primary Examiner(s): Habecker, Thomas B.
• Application Number:
  US05/107,017
• Time in Patent Office: 477 Days
• Field of Search: 340/38R,38L,38S,38P
• US Class Current: 340/933
• CPC Class Codes: G08G 1/097 Supervising of traffic control systems, e.g. by giving an alarm if two crossing streets have green light simultaneously

Abstract

Primary and secondary vehicle sensors are utilized to detect vehicles moving along a roadway, this information being available for use in a traffic control system. Primary and secondary counters associated with the primary and secondary vehicle sensors respectively are driven by a timing pulse source. The counters are reset to zero in response to their associated vehicle sensors so that the maximum count thereon is indicative of the time between successive actuations of such sensors. A timing limit selector is utilized to select a timing interval indicative of a probable failure in the operation of either of the vehicle sensors. This selected timing output is separately compared with the outputs of the counters, and when coincidence between the selected timing output and the output of either of the counters is reached, a failure signal is generated. This failure signal is utilized both to actuate an appropriate fail indicator and to control logical gating circuitry to provide an output signal solely in response to the vehicle sensor not associated with this failure signal.

Claims

1. A fail safe vehicle detection system comprising:

vehicle sensor means for generating pulse signals in accordance with vehicle sensed thereby, a timing pulse source, counter means for counting the output of said pulse source, means for providing signals for resetting said counter means to zero in response to the output of said sensor means, timing limit selector means for selecting a predetermined timing interval which is greater than the maximum timing interval expected between vehicles actuating said sensor, comparator means for comparing the output of said counter means with the output of said timing limit selector means and for generating a '"'"''"'"''"'"''"'"'fail'"'"''"'"''"'"''"'"' control signal when coincidence between said outputs is reached, and logical gating circuit means responsive to the output of said comparator means for providing an output in accordance with said vehicle sensor means signals solely when said comparator means is not generating a '"'"''"'"''"'"''"'"'fail'"'"''"'"''"'"''"'"' control signal.

2. The system of claim 1 and further including means responsive to the output of said comparator means for inhibiting the counting of said counter means when said coincidence condition is reached.

3. The system of claim 1 and further comprising indicator means for generating a '"'"''"'"''"'"''"'"'fail'"'"''"'"''"'"''"'"' indication in response to said '"'"''"'"''"'"''"'"'fail'"'"''"'"''"'"''"'"' control signal.

4. The system of claim 1 wherein said counter means comprises a binary counter having predetermined outputs indicating successively higher counts, said selector means comprising a selector switch having predetermined positions corresponding to predetermined outputs of said counter and said comparator means includes a comparator for comparing each of said corresponding counter and switch position outputs for a coincidence condition.

5. The system of claim 1 wherein said timing limit selector means includes a plurality of selector switches each set to a predetermined different timing interval and remote selector means for alternatively feeding one of the selector switch outputs to said comparator means.

6. A fail safe vehicle detection system comprising:

primary and secondary vehicle sensor means for generating pulse signals in accordance with vehicles sensed thereby, a timing pulse source, primary and secondary counter means for counting the output of said pulse source, means for providing signals for resetting said primary and secondary counters to zero in response to the outputs of said primary and secondary vehicle sensors respectively, timing limit selector means for selecting a predetermined timing interval which is greater than the maximum timing interval expected between vehicles actuating said sensors, comparator means for separately comparing the outputs of said primary and secondary counter means respectively, with the output of said timing selector means and for generating a '"'"''"'"''"'"''"'"'fail'"'"''"'"''"'"''"'"' control signal when coincidence between the compared signals is reached, logical gating circuit means responsive to the outputs of said comparator means for alternatively providing an output in accordance with the primary sensor means signals when there is not a '"'"''"'"''"'"''"'"'fail'"'"''"'"''"'"''"'"' output from the comparator means associated therewith and an output in accordance with the sensor signals for the secondary vehicle sensor means when there is a '"'"''"'"''"'"''"'"'fail'"'"''"'"''"'"''"'"' signal from the comparator means associated with the primary sensor and there is not a '"'"''"'"''"'"''"'"'fail'"'"''"'"''"'"''"'"' output from the comparator means associated with the secondary sensor.

7. The system of claim 6 and further including means responsive to the outputs of said comparator means for inhibiting the counting of the associated counter means when said coincidence condition is reached.

8. The system of claim 6 and further comprising indicator means for generating '"'"''"'"''"'"''"'"'fail'"'"''"'"''"'"''"'"' indications in response to said '"'"''"'"''"'"''"'"'fail'"'"''"'"''"'"''"'"' control signals.

9. The system of claim 6 wherein each of said counter means comprises a counter having predetermined outputs indicating successively higher counts, said selector means comprising a selector switch having predetermined positions corresponding to predetermined outputs of said counter and a comparator for comparing each of the corresponding counter and switch position outputs for a coincidence condition.