ANALOG-TO-DIGITAL MEASURING APPARATUS

• US 3,684,875 A
• Filed: 09/28/1970
• Issued: 08/15/1972
• Est. Priority Date: 09/28/1970
• Status: Expired due to Term

• Current Assignee: James E. Smith, Robert E. Luehr, Victor E. Borgogno
• Original Assignee: James E. Smith, Robert E. Luehr, Victor E. Borgogno
• Inventors: Smith, James E., Borgogno, Victor E., Luehr, Robert E.
• Primary Examiner(s): Botz, Eugene G.
• Assistant Examiner(s): Dildine, Jr., R. Stephen
• Application Number:
  US05/075,981
• Time in Patent Office: 687 Days
• Field of Search: 235/151.31,151.33,92WT 177/25,210,213 340/347AD
• US Class Current: 702/102
• CPC Class Codes: G01G 23/163 involving digital counting
• CPC Class Codes: G01G 7/04 with means for regulating the current to solenoids
• CPC Class Codes: G06F 7/4981 Adding; Subtracting
• CPC Class Codes: H03M 1/50 with intermediate conversion to time interval H03M1/64 takes precedence

Abstract

In an electronic digital-reading balance, electronic circuitry is provided for automatically deducting tare weight from the weight of an object being weighed wherein a latch circuit stores the digital reading of the tare weight, and a comparator in cooperation with display circuitry is capable of generating and displaying as a digital readout a value equal to the gross weight of the object being weighed less the tare weight stored in the latching circuitry. Although specifically adaptable for use in deducting tare or other given weights in a weigh balance apparatus, the same or similar circuitry has useful application to other analog-to-digital measuring and counting devices.

Claims

1. In analog-to-digital measuring apparatus for measuring the value of each of a series of electrical signals having clock means generating a series of uniformly spaced timing pulses, first counter means connected to said clock means for Periodically counting the timing pulses from zero to a predetermined count, the first counter means being operable to generate a first pulse at the commencement of each of its count cycles, and integration means responsive to the first pulse in each cycle to integrate with respect to time the magnitude of an electrical signal applied thereto, said integration means being operative to generate a second pulse a predetermined time interval after the generation of the first pulse where-in the time interval is proportional to the magnitude of each electrical signal to be measured, the combination therewith of first storage means selectively operative in response to receiving the second pulse in each cycle from the integrator means to read in and store the count on said first counter means at the instant the second pulse is generated;

comparator means connected to the first counter means and said first storage means for comparing the count on the first counter means with the count stored in said first storage means, said comparator means being operative to generate a third pulse whenever the count on the first counter means equals the count stored in said first storage means;

second counter means being reset to zero in response to the generation of a first pulse and for counting only in response to a third pulse the additional counts in a next cycle of the integrated value of an electrical signal in excess of the value of a preceding signal measured by said integration means, and second storage means responsive to the second pulse in each cycle for reading in and storing the count on said second counter means at the instant the second pulse is generated.

2. The invention recited in claim 1, including display means connected to said second storage means for displaying the count stored in said second storage means in each cycle.

3. The invention recited in claim 1, including:

display means for indicating a decimal numeral; and

driver means interconnected between said second storage means and said display means for decoding the count in said second storage means and driving said display means to indicate as a decimal numeral the count in said second storage means.

4. The invention recited in claim 1, wherein said integrator means is responsive to the first pulse in each cycle for generating an electrical output signal a time interval after the generation of said first pulse which is proportional to the magnitude of an electrical signal received by said integrator means;

and circuit means connected to said integrator means for generating the second pulse whenever the electrical output signal is generated by said integrator means.

5. The invention recited in claim 1 wherein said integrator means is operative to receive an electrical voltage signal;

and including analog signal measuring means connected to the integrator means for converting an analog signal sensed to an electrical voltage signal and transmitting the voltage signal to said integrator means.

6. The invention recited in claim 5, wherein the time interval between the first and second pulses is proportional to the magnitude of a DC voltage signal being received by said integrator means, and said analog signal measuring means is operable to convert an analog signal sensed into a DC voltage signal.

7. The invention recited in claim 1 wherein the second counter means includes:

a counter circuit, said counter circuit being operable to count and receive ones of said clock pulses and responsive to said first pulse to reset its count to zero; and

a control gate responsive to said third and first pulses and connected between said clock means and said counter circuit to control the transmission of clock pulses from said clock means to said counter circuit, said control gate being operable to transmit clock pulses from said clock means to said counter circuit during the time interval measured from the instant of generation of the third pulse to the instant of generation of the fIrst pulse.

8. The invention recited in claim 1, including selectively operable switch means for generating a load signal;

gate means responsive to the second pulse and the load signal for generating a load pulse whenever the second pulse and the load signal are simultaneously generated; and

said first storage means connected to said first counter means and responsive to the load pulse to read in and store the count on the first counter means at the instant the load pulse is generated.

9. Weight measuring apparatus, comprising:

means for weighing an object and generating an electrical signal proportional to the weight of an object being weighed;

clock means for generating a time signal of uniformly spaced clock pulses;

first counter means connected to said clock means for periodically counting said cock pulses from zero to a predetermined count, said first counter means being operable to generate a first pulse at the commencement of each of its count cycles;

means associated with said first counter means responsive to said first pulse for generating a time interval proportional to the magnitude of the electrical signal representing weight being generated by said weighing means, said time interval generating means being operable to generate a second pulse to indicate the end of said time interval whereby said time interval is measured by the period of time from the generation of said first pulse to the generation of said second pulse;

selectively operable first storage means connected to said first counter means and responsive to second pulse, said first storage means being operable upon selective actuation to read in and store the count on said first counter means at the instant said second pulse is generated;

comparator means connected to said first counter means and said first storage means for comparing the count on said first counter means with the count stored in said first storage means, said comparator means being operable to generate a third pulse whenever the count on said first counter means equals the count stored in said first storage means;

second counter means connected to said clock means and responsive to said first and third pulses for resetting its count to zero in response to said third and first pulses, said clock pulses generating during the time interval measured from the instant of generation of said third pulse to the instant of generation of said first pulse;

second storage means connected to said second counter means and responsive to said second pulse for reading in and storing the count on said second counter means at the instant said second pulse is generated; and

display means connected to said second storage means for displaying the count stored in said second storage means.

10. The invention recited in claim 9 wherein:

said time interval generating means includes integrator means connected to said weighing means and circuit means connected to said integrator means for generating said second pulse, said integrator means being operable in response to said first pulse to generate an electrical output signal a time period after the generation of said first pulse proportional to the magnitude of the electrical signal representing the weight being generated by said weighing means, said circuit means being operable to generate said second pulse whenever said predetermined electrical output signal is generated by said integrator means;

said selectively operable first storage means includes switch means, gate means and a storage register connected to said first counter means, said switch means being selectively operable to generate a load signal, said gate means being responsive to said second pulse and said load signal to generate a load pulse whenever said second pulse and said load signal are simultaneously generated, said storage register being operable in response to said load pulse to read in and store the count on said first counter means at the instant said load pulse is generated; and

said second counter means includes a counter circuit and a control gate connected between said clock means and said counter circuit to control the transmission of said clock pulses from said clock means to said counter circuit, said counter circuit being operable to count received ones of said clock pulses and responsive to said first pulse to reset its count to zero, said control gate being operable in response to said third and first pulses to transmit said clock pulses from said clock means to said counter circuit during the time interval measured from the instant of generation of said third pulse to the instant of generation of said first pulse.

11. The invention recited in claim 10 wherein:

said electrical signal proportional to the weight of an object being weighed which is generated by said weighing means is a DC voltage;

said integrator means is operable in response to said first pulse to generate said predetermined electrical output signal a time period after the generation of said first pulse proportional to the magnitude of the DC voltage representing weight being generated by said weighing means; and

said display means is operable to indicate a decimal numeral and includes driver means for decoding the count in said second storage means into decimal digits whereby said display means indicates as a decimal number the count in said second storage means.

12. Measuring apparatus comprising:

means for receiving analog signals and periodically generating first digital counts, each of said first digital counts being proportional to the magnitude of the analog signal being received at the time each one of said digital counts was generated;

storage means for selectively storing any selected ones of said first digital counts generated; and

means for generating and displaying a second digital count which is equal to the last generated one of said first digital counts less the count stored in said storage means.

13. The invention recited in claim 12 wherein said signal receiving means is operable to receive DC voltage signals.

14. The invention recited in claim 12, including means for converting an analog signal to be measured into a DC voltage signal proportional to the magnitude of the analog signal to be measured and for transmitting the DC voltage signal to said signal receiving means.

15. Measuring apparatus comprising:

signal receiving means for receiving a DC voltage signal to be measured;

clock means for generating a time signal of uniformly spaced clock pulses;

first counter means connected to said clock means for periodically counting said clock pulses from zero to a predetermined count, said first counter means being operable to generate a first pulse at the commencement of each of its count cycles;

integrator means connected to said signal receiving means and responsive to said first pulse for generating a time interval proportional to the magnitude of a DC voltage signal being received by said signal receiving means;

said integrator being operable to generate a predetermined output signal to indicate the end of said time interval;

circuit means connected to said integrator means for generating a second pulse whenever said predetermined electrical output signal is generated by said integrator means;

selectively operable switch means for generating a load signal;

first gate means responsive to said second pulse and said load signal for generating a load pulse whenever said second pulse and said load signal are simultaneously generated;

first storage means connected to said first counter means and responsive to said load pulse for reading in and storing the count on said first counter means at the instant said load pulse is generated;

comparator means connected to said first counter means and said first storage means for comparing the count on said first counter means with the count stored in said first storage means, said comparator means being operable to generate a third pulse whenever the count on said first counter means equals the count stored in said first storage means;

second counter means for counting received ones of said clock pulses, said counter means being responsive to said first pulse to reset its count to zero;

second gate means connected between said clock means and said second counter means for controlling the transmission of said cock pulses from said clock means to said second counter means, said second gate means being responsive to said third and first pulses to transmit said clock pulses to said clock means during the time interval measured from the instant of generation of said third pulse to the instant of generation of said first pulse;

second storage means connected to said second counter means and responsive to said second pulse for reading in and storing the count on said second counter means at the instant said second pulse is generated;

driver means connected to said second storage means for decoding the count in said second storage means into decimal digits driving said digital display means; and

digital display means connected to said driver means for displaying as a decimal numeral the count in said second storage means said driver means driving said digital display means.