ADAPTIVE DIGITAL COMMUNICATION SYSTEM

• US 3,700,820 A
• Filed: 03/18/1969
• Issued: 10/24/1972
• Est. Priority Date: 04/15/1966
• Status: Expired due to Term

• Current Assignee: Hann F. Najjar, Herman L. Blasbalg, Joshua Y. Hayase, Richard C. Crutchfield Jr
• Original Assignee: Hann F. Najjar, Herman L. Blasbalg, Joshua Y. Hayase, Richard C. Crutchfield Jr
• Inventors: Blasbalg, Herman L., Hayase, Joshua Y., Crutchfield, Richard C. Jr., Najjar, Hann F.
• Primary Examiner(s): Claffy, Kathleen H.
• Assistant Examiner(s): Stewart, David L.
• Application Number:
  US04/870,721
• Time in Patent Office: 1,316 Days
• Field of Search: 179/15BA,15BS,15BW,15BV,15A 178/50,69.5R 325/4 340/206
• US Class Current: 370/468
• CPC Class Codes: G06F 3/00 Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
• CPC Class Codes: H04J 3/07 using pulse stuffing for systems with different or fluctuating information rates or bit rates
• CPC Class Codes: H04J 3/1647 Subrate or multislot multiplexing
• CPC Class Codes: H04J 3/1682 Allocation of channels according to the instantaneous demands of the users, e.g. concentrated multiplexers, statistical multiplexers
• CPC Class Codes: H04L 1/0002 by adapting the transmission rate
• CPC Class Codes: H04L 1/0009 by adapting the channel coding H04L1/1812 takes precedence
• CPC Class Codes: H04L 1/0017 where the mode-switching is based on Quality of Service requirement
• CPC Class Codes: H04L 1/0025 Transmission of mode-switching indication
• CPC Class Codes: H04L 1/0052 Realisations of complexity reduction techniques, e.g. pipelining or use of look-up tables

Abstract

An adaptive digital multiplexer including a multiplex format computer, a time slot generator, and a combiner. The format computer determines the number of time slots required within a time frame and assigns input signals to time slots according to the information rate and priority of each input signal. Assignments are made such that transmission of lower priority input signals are interleaved between transmission of higher priority signals thereby allowing the multiplexed output to be adapted to a reduced transmission rate of increased bit duration by progressively eliminating transmission of lower priority signals.

Claims

1. An adaptive multiplexer for time division multiplexing a plurality of digital input signals, each of said input signals having an information rate which is the same as or different from the information rate of any other of said input signals, each of said input signals further being assigned a priority with respect to each other input siGnal, said adaptive multiplexer comprising:

a format computer having inputs for receiving signals representing said information rate and said priority of each of said input signals, said format computer computing a number of time slots required within a time frame in accordance with the number of said input signals and said information rate of each of said input signals and computing the time slot assignment for each of said input signals in accordance with its information rate and priority;

a time slot generator connected to said format computer for generating a plurality of time slots in accordance with the number of time slots specified by said format computer;

a combiner connected to said format computer and to said time slot generator for combining said input signals into said time slots provided by said time slot generator in accordance with the time slot assignment of said format computer.

2. generating said number of time slots;

3. The multiplexer of claim 1 wherein each input signal is supplied to an input/output interface device which retimes each signal so that it is in phase with each other signal.

4. The method of adaptively multiplexing a plurality of input signals, each of said input signals having an information rate which is a power of two of a base rate into an output signal having a rate which is a power of two of said base rate, comprising the steps of: