AUTOMATIC BATTERY POLARIZING CIRCUIT

• US 3,700,999 A
• Filed: 01/11/1972
• Issued: 10/24/1972
• Est. Priority Date: 01/11/1972
• Status: Expired due to Term

• Current Assignee: Stanley J. Gourse
• Original Assignee: Stanley J. Gourse
• Inventors: Gourse, Stanley J.
• Primary Examiner(s): Miller, J. D.
• Assistant Examiner(s): Hickey, Robert J.
• Application Number:
  US05/216,935
• Time in Patent Office: 287 Days
• Field of Search: 321/8,47,48 320/25,26 323/22T,75E 307/291
• US Class Current: 320/100
• CPC Class Codes: H02H 11/002 in case of inverted polarity or connection; with switching for obtaining correct connection
• CPC Class Codes: Y10S 320/15 Polarity control

Abstract

Disclosed is and automatic battery polarizing circuit employing transistors in the arms of a bridge circuit configuration wherein the transistors are operative to couple a battery connected to the input thereof in a manner that the bridge output voltage will always be of the same polarity regardless of how the battery is connected to the bridge input with respect to polarity.

Claims

1. An automatic battery polarizing circuit comprising in combination:

a bridge type control circuit having a pair of input terminals and a pair of output terminals;

a first PNP transistor switch connected between one of said input terminals and one of said output terminals;

a first NPN transistor switch connected between the other of said input terminals and the other of said output terminals;

a second NPN transistor switch connected between said one of said input terminals and said other of said output terminals;

a second PNP transistor switch connected between said other of said input terminals and said other of said output terminals;

an electrical load connected between said output terminals; and

a battery connected between said input terminals;

a first and a second voltage divider connected between said input terminal;

said first PNP transistor switch and said first NPN transistor switch biased into saturation through said first voltage divider coupled between said input terminals when the positive pole of said battery is connected to said one of said input terminals and the negative pole connected to the said other of said input terminals whereby said positive pole is connected to said one of the output terminals and the negative pole is connected to the said other of the output terminals, said second NPN transistor switch and said second PNP transistor switch being biased off through saiD second voltage divider connected between said input terminals, and when the positive pole of the battery is connected to said other of the input terminals and the negative pole to said one of the input terminals said second NPN transistor switch and said second PNP transistor switch are biased into saturation through the second voltage divider whereby said positive pole is connected to said one of the output terminals and said negative pole is connected to said other of the output terminals, said first PNP transistor switch and said first NPN transistor being biased off through the first voltage divider; and

means for isolating said transistor switches from the battery when in an off condition.

2. The invention in accordance with claim 1 wherein each said voltage divider comprises first, second and third series connected resistors, the first resistor of each said divider being connected to said one of the input terminals, and the third resistor of each said divider being connected to said other of the input terminals.

3. The invention in accordance with claim 2 wherein:

said first PNP transistor switch consists of a PNP transistor having an emitter connected to said one of the input terminals, a collector connected to said one of the output terminals and a base connected to a first junction formed between the first and second resistors of said first voltage divider;

said first NPN transistor switch consists of a NPN transistor having an emitter connected to said other of the input terminal, a collector connected to said other of the output terminals and a base connected to a second junction formed between the second and third resistors of said first voltage divider;

said second NPN transistor switch consists of a NPN transistor having an emitter connected to said one of the input terminals, a collector connected to said other of the output terminals and a base connected to a fourth junction formed between the second and third resistors of said second voltage divider; and

said second NPN transistor switch consists of a NPN transistor having an emitter connected to said one of the input terminals, a collector connected to said one of the output terminals and a base connected to a fifth junction formed between said second and third resistors of said second voltage divider.

4. The invention in accordance with claim 1 and said means for isolating said first PNP transistor switch, said first NPN transistor switch and said first voltage divider from said battery when said last recited transistor switches are in the off condition, comprising a first diode coupled in said first voltage divider between said first resistor and said first junction thereof, and a second diode coupled in said first voltage divider between the third resistor thereof and said other of the input terminals, said first and second diodes being poled in the first voltage divider in a manner that their greatest conductivity is in a direction from said one to the other of the input terminals.

5. The invention in accordance with claim 1 and said means for isolating said second NPN transistor switch, said second PNP transistor switch and said second voltage divider from said battery when said last recited transistor switches are in the off condition, comprising a third diode coupled in said second voltage divider between said third resistor and said third junction thereof, and a fourth diode coupled in said second voltage divider between said fourth junction and said first resistor thereof, said third and fourth diodes being poled in the second voltage divider in a manner that their greatest conductivity is in a direction from said other to said one of the input terminals.