METHOD FOR PRINTING ELECTRICAL CIRCUITS ON SUBSTRATES

• US 3,701,317 A
• Filed: 10/05/1970
• Issued: 10/31/1972
• Est. Priority Date: 09/19/1967
• Status: Expired due to Term

• Current Assignee: Hiroshi Miyamoto, Osamu Minowa, Tsuyoshi Isojima
• Original Assignee: Hiroshi Miyamoto, Osamu Minowa, Tsuyoshi Isojima
• Inventors: Miyamoto, Hiroshi, Isojima, Tsuyoshi, Minowa, Osamu
• Primary Examiner(s): Fisher, J. Reed
• Application Number:
  US05/077,909
• Time in Patent Office: 757 Days
• Field of Search: 101/41-44,163,170,426 117/227,212,123B 252/514,212 106/1,19,23,30 29/625 260/33.2,33.4,370,40,DIG.38
• US Class Current: 101/170
• CPC Class Codes: H01B 1/00 Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
• CPC Class Codes: H01B 1/22 the conductive material comprising metals or alloys
• CPC Class Codes: H05K 1/095 for polymer thick films, i.e. having a permanent organic polymeric binder
• CPC Class Codes: H05K 2203/0113 Female die used for patterning or transferring, e.g. temporary substrate having recessed pattern
• CPC Class Codes: H05K 2203/0534 Offset printing, i.e. transfer of a pattern from a carrier onto the substrate by using an intermediate member
• CPC Class Codes: H05K 3/1275 by other printing techniques, e.g. letterpress printing, intaglio printing, lithographic printing, offset printing
• CPC Class Codes: H05K 3/207 using a prefabricated paste pattern, ink pattern or powder pattern

Abstract

A method for forming an electrical circuit on a substrate by printing wherein a fluid ink material which consists of a resin solution and one of insulating, dielectric and conductive materials in powder dispersed in the solution is used. The ink material is replaced from an integlio plate to a silicone rubber transcriber and then printed on the substrate.

Claims

2. A method according to claim 1 wherein the substrate has a semiconductor element fixed to one side thereof, the sides of the semiconductor element are coated with an insulating material.

3. A method according to claim 2 wherein the semiconductor element is a transistor.

4. A method according to claim 2 wherein the semiconductor element is a hybrid integrated circuit.