SHIFT REGISTER INTERCONNECTION OF DATA PROCESSING SYSTEM

• US 3,713,096 A
• Filed: 03/31/1971
• Issued: 01/23/1973
• Est. Priority Date: 03/31/1971
• Status: Expired due to Term

• Current Assignee: George Radin, Webb T. Comfort
• Original Assignee: George Radin, Webb T. Comfort
• Inventors: Comfort, Webb T., Radin, George
• Primary Examiner(s): Shaw, Gareth D.
• Assistant Examiner(s): Vandenburg, John P.
• Application Number:
  US05/129,747
• Time in Patent Office: 664 Days
• Field of Search: 340/172.5 328/43,44,45 307/221,223
• US Class Current: 709/251
• CPC Class Codes: G06F 13/4213 with asynchronous protocol
• CPC Class Codes: H04L 12/42 Loop networks

Abstract

Units of a data processing system send and receive messages by means of a ring connection of shift register stages. One unit places a message with suitable control bits in an associated shift register stage of the ring and after a series of shifts, the destination unit receives the message at its stage of the ring. The invention overcomes the problem that a message from a downstream unit to a nearby upstream unit is ordinarily required to be shifted almost entirely around the ring with a delay introduced at each stage of the ring. Some of the units are connected to enter messages at register stages upstream of other units and to receive messages at register stages downstream of the other units. Units connected in this configuration have shortened data paths in either direction of communication. Several useful configurations are disclosed.

Claims

1. A ring interconnection system for units of a data processing system, comprising, a plurality of shift register stages interconnected to form a ring in which messages are shifted in a predetermined direction from stage to stage, each of said stages being substantially identical and each having a Connection point for receiving messages from a unit of the system and a connection point for transmitting messages to a unit of the system, and means connecting a first and a second of said units to a segment of said ring that is short in relation to the entire length of the ring, said connecting means comprising:

means connecting an output of said first unit to a first point on said segment for receiving messages on said ring from said first unit, means connecting an input of said second unit to a second point on said segment downstream of said first point for transmitting messages from said ring to said second unit, means connecting an output of said second unit to a third point on said segment downstream of said second point for receiving on said ring messages from said second unit, and means connecting an input of said first unit to a fourth point on said segment downstream of said third point for transmitting messages from said ring to said first unit, whereby said first and second units intercommunicate on said segment independently of the other stages of said ring.

2. The system of claim 1 wherein one of said connections of said first unit is at a register stage adjacent the register stage of said second unit.

3. A ring interconnection system for units of a data processing system, comprising, a plurality of shift register stages interconnected to form a ring in which messages are shifted in a predetermined direction from stage to stage, each of said stages being substantially identical and each having a connection point for receiving inputs from a unit of the system and a connection point for transmitting messages to a unit of the system, means connecting a first of said units to enter and receive messages at a first register stage, and means connecting a second of said units to enter messages at a second stage upstream of said first stage and to receive messages at a third stage downstream of said first stage, said second, third, and intervening stages forming a segment of the ring that is short in relation to the entire length of the ring, whereby said first and second units are connected to communicate with units of said ring outside said segment and are connected to intercommunicate on said segment independently of said other stages.