REPAIRABLE SEMICONDUCTOR CIRCUIT ELEMENT AND METHOD OF MANUFACTURE

• US 3,721,838 A
• Filed: 12/21/1970
• Issued: 03/20/1973
• Est. Priority Date: 12/21/1970
• Status: Expired due to Term

• Current Assignee: Leo B. Freeman Jr, Norman F. Brickman
• Original Assignee: Leo B. Freeman Jr, Norman F. Brickman
• Inventors: Brickman, Norman F., Freeman, Leo B. Jr.
• Primary Examiner(s): Craig, Jerry D.
• Application Number:
  US05/100,077
• Time in Patent Office: 820 Days
• Field of Search: 317/234,235,11A 307/204,219,303,304 340/173,173NR
• US Class Current: 327/427
• CPC Class Codes: G11C 13/0004 comprising amorphous/crystalline phase transition cells
• CPC Class Codes: G11C 29/785 with redundancy programming schemes
• CPC Class Codes: H01L 27/00 Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate details thereof H01L23/00, H01L29/00 - H10K10/00; assemblies consisting of a plurality of individual solid state devices H01L25/00
• CPC Class Codes: H01L 27/118 Masterslice integrated circuits
• CPC Class Codes: H10B 63/10 Phase change RAM [PCRAM, PRAM] devices

Abstract

A monolithic device is fabricated to permit electrical alteration thereof, whereby a circuit element or group of circuit elements therein may be substituted for other elements. An electrically alterable bistable element, typically an amorphous chalcogenide or amorphous metal-oxide, is suitably installed in the monolithic device by processes compatible with conventional semiconductor processes. The bistable element is connected in the circuit of the device and adapted to be electrically programmed for substitution of a circuit element or groups of circuit elements for other elements. The ability of a monolithic device to be repaired increases yields in manufacturing, lowers cost and extends the lifetime of such devices.

Claims

2. The switching device of claim 1 wherein the first and second switching circuits comprise unipolar devices.

3. The switching device of claim 1 wherein the first and second switching circuits comprise bipolar devices.

4. The switching device of claim 1 wherein the bistable switching element is an amorphous switching element comprising a chalcogenide glass film disposed between molybdenum electrodes.

5. The switching device of claim 4 wherein the amorphous switching element comprises a chalcogenide glass film disposed between aluminum electrodes.

6. The switching device of claim 4 wherein the amorphous switching element comprises a niobium oxide film disposed between niobium and bismuth electrodes.

7. The switching device of claim 4 wherein the amorphous switching element comprises a zirconium oxide film disposed between zirconium and gold electrodes.

8. The switching device of claim 4 wherein the means to operate the amorphous switching elements comprises electrical signals for controlling the application of voltage to the amorphous switching elements to change the electrical states thereof.

9. The switching device of claim 4 wherein the switching devices are unipolar devices and the amorphous switching elements are chalcogenide glass films disposed between metal electrodes responsive to electrical signals that switch the amorphous switching elements from a first permanent state to a second permanent state to inactivate the selected first and second switching circuit and programmably activate the first and second redundant switching circuit as a substitute thereof.

10. A repairable monolithic memory device comprising a. a semiconductor substrate, b. a plurality of personalized storage circuits disposed within the substrate in an active state, c. a plurality of personalized decoder circuits disposed within the substrate in an active state and connected to said storage circuits, said decoder circuits being adapted to receive electrical input signals, d. at least one first bistable switching element united to the substrate and having a low impedance state and a high impedance state, e. gating means connecting said one first bistable switching element to at least one of said decoder circuits, f. at least one spare personalized storage circuit disposed within the substrate in a passive state, g. at least one spare personalized and programmable decoder circuits disposed within the substrate in a passive state and connected to said spare storage circuit, h. at least one second bistable switching element united to the substrate and having a low impedance state and a high impedance state, i. gating means connecting said one second bistable switching element to at least one of said spare decoder circuits, j. and means to selectively operate said gating means to cause said first and second bistable switching elements to change input state to disable a decoder circuit and storage circuit and selectively activate a spare decoder and storage circuit as a substitute for the disabled circuits, respectively without alteration of the input signals.

11. The repairable monolithic memory device of claim 10 wherein the personalized decoder and storage circuits are greAter in number than the number of personalized spare decoder and storage circuits.