DIGITAL DIFFERENTIAL PULSE CODE MODEM

• US 3,723,879 A
• Filed: 12/30/1971
• Issued: 03/27/1973
• Est. Priority Date: 12/30/1971
• Status: Expired due to Term

• Current Assignee: Leonard S. Golding, Pradman P. Kaul
• Original Assignee: Leonard S. Golding, Pradman P. Kaul
• Inventors: Kaul, Pradman P., Golding, Leonard S.
• Primary Examiner(s): Robinson, Thomas A.
• Application Number:
  US05/214,271
• Time in Patent Office: 453 Days
• Field of Search: 325/38R,38A,38B,321,141 178/DIG.3,68 179/15.55T,15.55R,15AC,15AP,15AV,15BW 332/9,11R,11D
• US Class Current: 704/212
• CPC Class Codes: H03M 7/3044 Conversion to or from differential modulation with several bits only, i.e. the difference between successive samples being coded by more than one bit, e.g. differential pulse code modulation [DPCM] H03M7/3004 takes precedence; voice coding G10L19/00; image coding H04N19/00

Abstract

A differential pulse code modem receives digitally quantized samples of an input analog signal and produces digital words or codes representing difference levels. Each output word represents the difference between successive input samples. A comparable differential pulse code modem receives the digital words representing difference levels and reconstructs the original quantized samples. The quantized samples are then reconverted into a replica of the original analog signal. The bit rate of a communications system using said modem is reduced by transmitting digital words, some of which uniquely represent a single difference level, and some of which represent two distinct difference levels. Thus the total number of unique digital output words which can be transmitted is less than the total number of difference levels, about which information must be conveyed to the receiver. The apparent ambiguity caused by sending a digital word which represents two distinct difference levels is resolved by a technique which uses the same digital word to represent only disjoint difference levels. When subtracting a preceding sample from the present or current sample the resulting difference level cannot exceed a maximum positive or negative value determined by the dynamic range of the sample values. Two difference levels are disjoint if there exists no possible value for the preceding sample which could result in both difference levels. The same digital word is sent out whether the difference level information to be conveyed is the first or the second difference level. The reconstructed prior sample provides the information needed to exclude one of the disjoint levels represented by the received digital word.

Claims

1. A differential pulse code modem for transmitting X difference levels with N-bit binary vectors, where X>

2N, comprising, a. means for subtracting an input signal at time ti 1 from the said input signal at time ti, to develop difference values Delta i, where i 1, 2, 3, . . . etc., b. means responsive to each said difference value Delta i for generating an N bit binary vector, where at least some binary N bit vectors represent two disjoint difference values, and c. means for transmitting said binary N bit vectors.

2. A differential pulse code modulator as claimed in claim 1 wherein said subtracting means comprises, a. a subtractor having two inputs, one of which is adapted to receive said input signal at time ti, b. a storage means for storing a quantity representing the input signal at time ti 1, the said quantity being connected to the other input of said subtractor, and c. addition logic means connected between said storage means and said N-bit binary vector generating means for adding Delta i represented by said N-bit binary vector to the quantity in said storage means and replacing the said quantity with the sum formed by said addition logic.

3. A differential pulse code modulator as claimed in claim 2 further comprising a receiver for receiving said N bit binary vector and reconstructing said input signal, said receiver comprising, a. storage means for storing a quantity therein b. addition logic means responsive to each N bit binary vector for adding Delta i represented by said vector to the quantity stored in said storage means, and c. means for replacing said quantity in said storage means with the sum formed by said addition logic.

4. A differential pulse code modem for conveying a series of items of information Si, where i represents the order of occurrance, between first and second stations, the maximum dynamic range of said items being 2m, where each item is represented by an M-bit binary vector, said modem comprising a transmit portion and a receive portion, said transmit portion comprising, a. storage means for storing an M-bit binary vector, b. binary subtraction means connected to said storage means and also connected to receive said series of items of information, for subtracting said stored M-bit vector from Si to develop a binary difference Delta i, wherein each Delta i is represented by an M-bit binary vector Si, c. means responsive to Delta i when Delta i is in a predetermined range of possible values for Delta i for generating an N-bit binary vector Delta i*, where N <

or = M and wherein some Delta i* binary vectors represent two disjoint difference values, and for transmitting Delta i*, d. combining means responsive to said N bit binary vector Delta i* and said stored M bit vector for adding Delta i to said stored M bit vector to form a sum M bit vector, and e. means for replacing the M bit vector stored in said storage means with said sum M bit vector.

5. A differential pulse code modulator as claimed in claim 4 wherein said combining means comprises, a. means adapted to add M-N low order bits to each Delta i* generated by said generating means to form an M bit vector substantially identicAl to Delta i, and b. binary addition means for adding said last mentioned M bit vector to said stored M bit vector, and dropping any carry over bit to the M+1 bit position, to form said M bit sum.

6. A differential pulse code modulator as claimed in claim 5 wherein said predetermined range is the entire range of possible Delta i difference values

7. A differential pulse code modulator as claimed in claim 4 wherein all values of Delta i greater than a reference positive value or less than a reference negative level are within said predetermined range.

8. A differential pulse code modulator as claimed in claim 7 wherein said generating means further comprises means for generating a K bit code indicating that Delta i is within said predetermined range, and transmitting said K bit code along with Delta i* to indicate that Delta i* represents a Delta i value within said predetermined range.

9. A differential pulse code modulator as claimed in claim 8 further comprising, a. second generating means responsive to Delta i, when Delta i is outside of said predetermined range, for generating an N bit binary vector Delta i*, wherein each Delta i* vector generated by said second generating means represents only one difference level Delta i outside said predetermined range.

10. A differential pulse code modulator as claimed in claim 9 wherein said second generating means comprises, a. means for selecting the N least significant bits of Delta i for each Delta i outside said predetermined range, and b. means for generating a K bit code indicating that Delta i is outside said predetermined range and transmitting said K bit code along with Delta i* to indicate that Delta i* represents a Delta i value outside said predetermined range.

11. A differential pulse code modulator as claimed in claim 10 wherein said combining means comprises, a. means responsive to each K bit code generated for detecting whether the associated Delta i* represents a Delta i which is within or outside said predetermined range, b. means responsive to a detection by said detecting means that Delta i* represents a Delta i which is within said predetermined range for adding M-N low order bits to Delta i* to form an M-bit vector substantially identical to Delta i at least in the N most significant bit positions, c. means responsive to a detection by said detecting means that Delta i* represents a Delta i outside said predetermined range for adding M-N high order bits to Delta i* to form an M-bit vector identical to Delta i, and d. binary addition means for adding the M-bit vector formed by either of said latter two means to said stored M-bit vector, and dropping any carry over bit to the M+1 bit position, to form said M bit sum.

12. A differential pulse code modulator as claimed in claim 11 wherein K is a 1 bit code which is either a 1 or 0 depending on whether Delta i is within or outside said predetermined range,

13. A differential pulse code modulator as claimed in claim 4 wherein said receive portion of said modem comprises, a. a storage means for storing an M-bit vector, b. means responsive to the receipt of Delta i* for combining Delta i represented thereby with said stored M-bit vector to form an output M bit vector, and c. means for replacing said M bit vector in said storage means with said output M-bit vector.

14. A differential pulse code modulator as claimed in claim 6 wherein said receive portion of said modem comprises, a. a storage means for storing an M-bit vector, b. means responsive to the receipt of each Delta i* for adding M-N low order bits to each Delta i* to form an M-bit vector identical to Si at least in the N most significant bit positions, c. Binary addition means for adding said last mentioned M-bit vector to said stored M-bit vector and dropping any carry over bit to the M+1 bit position, to form an output M-bit vector, and d. means for replacing said M-bit vector stored in said storage means with said output M-bit vector.

15. A differential pulse code modulator as claimed in claim 11 wherein said receive portion of said modem comprises, a. a storage means for storing an M-bit vector, b. means responsive to the receipt of each K-bit code and associated Delta i* for detecting whether Delta i* represents a Delta i value within or outside said predetermined range, c. means responsive to a detection by said latter detecting means that Delta i* represents a Delta i value which is within said predetermined range for adding M-N low order bits to Delta i* to form an M-bit vector identical to Delta i at least in the N most significant bit positions, d. means responsive to a detection by said latter detection means that Delta i* represents a Delta i value outside said predetermined range for adding M-N high order bits to Delta i* to form an M-bit vector identical to Delta i, e. binary addition means for adding the M-bit vector formed by either of said latter two means to said stored M-bit vector, and dropping any carry over bit to the M+1 bit position, to form an output M-bit vector, and f. means for replacing said M-bit vector stored in said storage means with said output M-bit vector.

16. A differential pulse code modulator as claimed in claim 15 wherein K is a 1 bit code which is either a 1 or 0 depending on whether i is within or outside said predetermined range.

17. A differential pulse code modulator as claimed in claim 16 wherein M-N >

or = 2.

18. A method of converting an input signal into code form, from which said input signal is reproducable, comprising, a. sampling the input signal to form a series of samples, b. forming a difference value for each sample representing the difference between said sample and the preceeding sample, c. detecting whether said difference value is in a first or second range of possible difference values, d. selecting a code word from a limited set of code words to signify said difference value, at least some of said code words being selected for three unlike difference values, one in the first range and two disjoint difference values in the second range, and e. generating a signal to distinguish code words representing levels in said first range from code words representing levels in said second range.

19. The method as claimed in claim 18 wherein every code word in said limited set respectively represents a unique difference value within said first range of difference values.

20. The method as claimed in claim 19 wherein the step of generating comprises generating a single bit of a first value to accompany each code word representing a difference value in said first range, and generating a signal of a second value to accompany each code word representing a difference value in said second range.

21. The method as claimed in claim 19 wherein the step of generating comprises generating a marker code to accompany only those code words representing difference values in said second range.

22. A differential pulse code modem for converting an input signal into a digital representation thereof comprising, a. means for periodically forming difference values equal to the amplitude difference of adjacent periodic samples of said input signal, b. code selecting means responsive to said difference values for selecting one of a limited set of codes to represent said difference value, said code selecting means comprising means responsive to difference values + A and - B for selecting the identical code C to represent said difference values, whEre A + B equals the dynamic range of the input signal.