INTEGRATED CIRCUIT BALANCED MIXER APPARATUS

• US 3,727,078 A
• Filed: 03/30/1972
• Issued: 04/10/1973
• Est. Priority Date: 03/30/1972
• Status: Expired due to Term

• Current Assignee: Donald L. Wollesen
• Original Assignee: Donald L. Wollesen
• Inventors: Wollesen, Donald L.
• Primary Examiner(s): Saalbach, Herman Karl
• Assistant Examiner(s): Hart, R. E.
• Application Number:
  US05/239,549
• Time in Patent Office: 376 Days
• Field of Search: 330/15,29,35 313/298,300 332/43B,44 307/205,251,279,304
• US Class Current: 327/113
• CPC Class Codes: H03D 2200/0043 Bias and operating point
• CPC Class Codes: H03D 7/125 with field effect transistors
• CPC Class Codes: H03D 7/1441 using field-effect transistors H03D7/145 takes precedence
• CPC Class Codes: H03D 7/1491 Arrangements to linearise a transconductance stage of a mixer arrangement

Abstract

Balanced mixer circuit apparatus using two matched integrated circuit field effect transistors as active elements wherein one input signal is applied to the gates of the transistors in pushpull relationship and a second input signal is applied to the substrates of the transistors in a common mode push-push manner. Both input signals thus look into capacitive loads which for practical purposes can be considered to be open circuits, thereby averting any harmonic distortion which might otherwise be produced by loading of the input drive circuits.

Claims

1. Balanced mixer circuit apparatus comprising:

a first semiconductive body of a first conductivity type having first and second field effect transistors disposed therein, each of said field effect transistors having a control gate, a source and drain, said first body forming a substrate gate common to said first and second transistors;

means electrically coupling the sources of said first and second transistors together;

first input circuit means for coupling a first input signal of a first frequency in push-pull relationship to the control gates of said first and second transistors;

second input circuit means for coupling a second input signal of a second frequency to said substrate gate;

a source of DC potential coupled in circuit across the source and drain of said first and second transistors; and

output circuit means coupled between the drains of said first and second transistors, whereby said first and second signals simultaneously drive said first and second field effect transistors to develop an output signal in said output circuit means including the sum and difference frequencies of said first and second input signals.

2. Balanced mixer circuit apparatus as recited in claim 1 wherein said first and second transistors are matched junction field effect transistors including, second bodies of semiconductive material of a second conductivity type forming first pn junctions with said first body, and third bodies of semiconductive material of said first conductivity type forming second pn junctions with said second bodies.

3. Balanced mixer circuit apparatus as recited in claim 1 wherein said first input circuit means includes a first center tapped transformer having its center tap coupled to one side of said source of potential, and said output circUit includes a second center tapped transformer having its center tap coupled to the other side of said source of potential.

4. Balanced mixer circuit apparatus as recited in claim 1 wherein said second input circuit means includes a filter for allowing only signals of said second frequency to be coupled into said semiconductive body.

5. Balanced mixer circuit apparatus as recited in claim 1 wherein said first and second transistors are matched metal oxide silicon field effect transsistors including, source, drain and channel regions of a second conductivity type forming pn junctions with said first body, and metallic control gate electrodes separated from said channel regions by a layer of electrically insulated material.