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METHOD AND APPARATUS FOR ANALYZING SEMICONDUCTORS

  • US 3,731,192 A
  • Filed: 05/28/1971
  • Issued: 05/01/1973
  • Est. Priority Date: 05/28/1971
  • Status: Expired due to Term
First Claim
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1. A process for analyzing a semiconductor wafer comprising the steps of:

  • forming a diode region in the wafer;

    successively applying different values of reverse-bias voltage V to the diode region, thereby forming successive depletion layers of different depth X;

    applying a constant A.C. cuRrent of frequency f1 to the diode region;

    detecting the voltage across the diode region at frequency f1, said voltage being indicative of the depletion layer depth X;

    applying a voltage of frequency f2 to the diode region, said frequency f2 being small compared to f1, said voltage resulting in a modulation parameter Delta X equal to the variation in depletion layer depth, and a modulation parameter Delta E equal to the variation of electric field in the depletion layer;

    maintaining one of the modulation parameters constant with changes of depletion layer depth X, and detecting the modulation of the f1 signal at frequency f2 for different values of bias voltage V, thereby to evaluate the diode region at different depths.

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