PULSE TRAIN DECODER-DEGARBLER

• US 3,732,563 A
• Filed: 07/12/1971
• Issued: 05/08/1973
• Est. Priority Date: 07/12/1971
• Status: Expired due to Term

• Current Assignee: George P. Nelson
• Original Assignee: George P. Nelson
• Inventors: Nelson, George P.
• Primary Examiner(s): Tubbesing, T. H.
• Application Number:
  US05/161,672
• Time in Patent Office: 666 Days
• Field of Search: 343/6.5R,6.5LC
• US Class Current: 342/40
• CPC Class Codes: G01S 13/784 Coders or decoders therefor; Degarbling systems; Defruiting systems

Abstract

A decoder-degarbler for increasing the decoding efficiency of IFF decoders in the presence of garbled signals. Three delay lines and logic circuitry are utilized to detect the presence of a garble condition and bracket decode condition. A coincidence means then determines if an established decoding criteria has been met whereby there is a degarbled bracket decode output to permit decoding of the pulse train data input.

Claims

1. An IFF decoder-degarbler comprising:

a transponder reply pulse train signal;

means for detecting the framing pulses of said transponder signal comprising a plurality of equal delay lines, each of said delay lines comprising a plurality of shift registers, said delay lines having a plurality of output taps; and

a source of clock pulses coupled to said delay lines for shifting said transponder signal through said delay lines;

means for indicating the non-presence of a garble condition; and

coincidence means coupled to said detecting and indicating means for permitting decoding of said transponder signal.

2. An IFF decoder-degarbler as recited in claim 1 wherein said detecting means comprises an AND gate coupled to the input and output of the second of said plurality of delay lines.

3. An IFF decoder-degarbler as recited in claim 2 wherein said gate indicating means further comprises an OR gate.

4. An IFF decoder-degarbler as recited in claim 3 further including a plurality of first AND gates, each of said first AND gates having their inputs coupled to taps on said delay lines separated by a time delay equal to that of a delay line, said first AND gate coupled to said OR gate.

5. An IFF decoder-degarbler as recited in claim 4 further including first register means coupled between said detecting means and said coincidence means;

and second register means and NOT gates coupled between said OR gate and said coincidence means;

whereby said first and second register means establish decoding criteria for said pulse train signal.

6. An IFF decoder-degarbler as recited in claim 5 further including second AND gates coupled to the output taps of said second delay lines;

and a delay register coupled between said coincidence means and each of said second AND gates for synchronizing the coincidence means output with the output of said second delay line taps.

7. An IFF decoder-degarbler as recited in claim 6 wherein said plurality of delay lines comprise three delay lines of 20.3 microseconds and each of said delay lines have 15 output taps.

8. An IFF decoder-degarbler comprising:

a transponder reply pulse train signal;

equal delay means with gates coupled thereto for detecting the framing pulses of said transponder signal;

means for indicating the non-presence of garble condition; and

coincidence means coupled to said detecting and indicating means for permitting decoding of said transponder signal.