PROGRAMMABLE CODE SELECTION FOR AUTOMATIC ADDRESS ANSWERBACK IN A TERMINAL SYSTEM

• US 3,735,106 A
• Filed: 12/30/1971
• Issued: 05/22/1973
• Est. Priority Date: 12/30/1971
• Status: Expired due to Term

• Current Assignee: John Thomas Hollaway
• Original Assignee: John Thomas Hollaway
• Inventors: Hollaway, John Thomas
• Primary Examiner(s): Robinson, Thomas A.
• Application Number:
  US05/214,266
• Time in Patent Office: 509 Days
• Field of Search: 340/313,147PC,347DD,163 235/154 178/4.1B
• US Class Current: 341/78
• CPC Class Codes: G06F 11/006 Identification G06F11/2289 takes precedence
• CPC Class Codes: G06F 12/0684 with feedback, e.g. presence or absence of unit detected by addressing, overflow detection
• CPC Class Codes: G06F 12/1458 by checking the subject access rights

Abstract

An automatic terminal identifying system is provided which allows a terminal to respond with decimal weighted identity codes upon receipt of an identification query from a processor. To develop the identity characters the total decimal equivalent sum for each bit position of the unique identifying binary codes assigned to a terminal is determined with a binary 1 in bit 1 of character 1 given a decimal value of 1; a binary 1 in bit 1 of character 2 given a decimal value of 2; a binary 1 in bit 1 of character 3 given a decimal value of 4, etc. For three characters logical signals are generated from two clocks which are applied by means of jumpers to the output buss of the terminal such that the logical signal representative of the required decimal sum is applied to each of the bit positions on the output buss as characters are transmitted sequentially to the processor. This is accomplished by overlapping the two clocks to define three character times. A value of decimal one is applied to the output buss of the terminal during character one time; decimal two applied during character two time; and decimal four applied during character three time. Appropriate logical combinations of these clocks thus allows any decimal numbers zero through seven to be applied by means of the jumpers to the output buss of the terminal.

Claims

1. A method of generating a weighted terminal identifier character, from a first set of terminal identifying characters having bit positions B1, B2, - Bn, on corresponding output lines of a terminal connected to a central processing unit, said method comprising the steps of:

applying a different weighting value to each of said first set of characters;

calculating a weighted total sum for each of said bit positions, B1, B2, - Bn, of said first set of characters;

generating logical signals representative of said weighted total sums of each of said bit positions B1, B2, - Bn, of said first set of characters; and

applying said logical signals to said output lines of said terminal with said logical signals representing said total sum for bit position B1 being applied to its corresponding output lines;

said logical signals representing said total sum for B2 being applied to its corresponding output line, and the logical signals representing said total sum for Bn applied to its corresponding output line.

2. The method of claim 1 further wherein said first set of characters is weighted in a binary progression with each binary one in one of said characters being afforded a decimal equivalent of one, with each binary one a second of said first set of characters being afforded a decimal two;

with each binary one in a third of said first set of characters being afforded a decimal equivalent of four, etc.

3. The method of claim 1 further wherein said logical signals are generated from clock signals which define a character time for each of said identifying characters such that said clock signaL taken with the weighting value of each of said first set of characters results in the generation of signals representative of said weighted total sum.

4. The method of claim 2 further wherein said logical signals are generated from clock signals which define a character time for each of said identifying characters such that said clock signal taken with the weighting value of each of said first set of characters results in the generation of signals representative of said weighted total sum.

5. The method of claim 4 further wherein during a first character time a decimal value equal to 20 is output to said output lines;

during a second character time a decimal value equal to the 21 is output to said output lines;

during a third character time a decimal value equal to 22 is output to said output lines and the above sequence repeated for each additional character time.

6. A data processing system comprising:

a central processing unit, at least one terminal in communication with said central processing unit;

means for transferring upon command codes assigned to said terminal to said central processing unit, said assigned codes being transmitted in decimal equivalent form to said central processing unit and decoded by said central processing unit to determine the binary equivalent of said assigned codes.

7. The data processing system of claim 6 wherein said assigned code is originally in the form of a plurality of binary characters which are converted to a decimal equivalent form.

8. The data processing system of claim 7 wherein said plurality of characters is weighted in a binary progression with each binary one in one of said binary characters being afforded a decimal value of one, with each binary one in a second of said binary characters being afforded a decimal value of two;

with each binary one in a third of said binary characters being afforded a decimal value of four, etc.; and

the said decimal equivalent is obtained by totaling the decimal sum for each of the bit positions of said binary characters.