MONOLITHIC BI-POLAR SEMICONDUCTOR DEVICE EMPLOYING CERMET FOR BOTH SCHOTTKY BARRIER AND OHMIC CONTACT

• US 3,737,742 A
• Filed: 09/30/1971
• Issued: 06/05/1973
• Est. Priority Date: 09/30/1971
• Status: Expired due to Term

• Current Assignee: David R. Breuer, James L. Buie
• Original Assignee: David R. Breuer, James L. Buie
• Inventors: Breuer, David R., Buie, James L.
• Primary Examiner(s): Huckert, John W.
• Assistant Examiner(s): James, Andrew J.
• Application Number:
  US05/185,137
• Time in Patent Office: 614 Days
• Field of Search: 317/234,235,22,31,42,5,5.4
• US Class Current: 257/479
• CPC Class Codes: H01L 21/00 Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
• CPC Class Codes: H01L 27/0766 with Schottky diodes only
• CPC Class Codes: H01L 29/00 Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor H01L31/00 - H01L33/00, H10K10/00, H10N take precedence; details other than of semiconductor bodies or of electrodes thereof H01L23/00; devices consisting of a plurality of solid state components formed in or on a common substrate H01L27/00

Abstract

A layer of cermet material, deposited in a single processing step, connects the base and collector regions of a bipolar transistor to form a Schottky barrier diode therebetween; makes ohmic contact to highly doped shallow diffused regions such as the emitter and collector contact areas; provides a barrier by preventing the interaction of contact metal and the shallow diffused semiconductor regions; and produces a thin film resistor of low parasitic capacitance for connection to the transistor.

Claims

1. A monolithic semiconductor device, comprising:

a. a body of semiconductor having a lightly doped region defining a collector, a first heavily doped region defining a base, and a second heavily doped region defining an emitter;

b. said base and collector regions being contiguous with each other and said emitter region being contiguous with a portion of said base region;

c. a first coating of cermet material on contiguous surface areas of said base and collector regions forming Schottky barrier contact with said collector region and ohmic contact with said base region;

d. a second coating of cermet material on a surface of said emitter region forming ohmic contact therewith;

e. a heavily doped region in said collector region defining a contact area; and

f. a third coating of cermet material on said collector contact area forming ohmic contact therewith.

2. The invention according to claim 1, wherein said cermet material consists of 65 to 50% chromium and 35 to 50% silicon monoxide by weight.

3. The invention according to claim 2, wherein said cermet material consists essentially of 58% chromium and 42% silicon monoxide.

4. The invention according to claim 1, wherein said cermet material consists essentially of 60 to 40% silicon and 40 to 60% chromium by weight.

5. The invention according to claim 4, wherein said cermet material consists essentially of 50% silicon and 50% chromium.

6. The invention according to claim 1, wherein said lightly doped regions have an impurity concentration of 8.5 X 1016 atoms/cm3 or less.

7. The invention according to claim 6, wherein said heavily doped regions have an impurity concentration of 5 X 1018 atoms/cm3 or greater.

8. The invention accOrding to claim 1, and further including a layer of contact metal on said cermet coatings, said metal layer forming a common contact to said collector and base regions and separate contacts to said emitter region and said collector contact area.

9. The invention according to claim 8 and further including a passivating oxide layer on a surface of said semiconductor body;

said oxide layer being formed with openings defining the regions of said semiconductor body where said cermet coatings and said contact metal layers are deposited.

10. The invention according to claim 9 and further including a fourth coating of cermet material on said oxide layer and spaced from said first, second, and third cermet coatings;

and a layer of contact metal joining said fourth cermet coating and one of said contact metal layers on the first three mentioned cermet coatings;

said fourth cermet coating functioning as a thin film resistor in circuit with said monolithic semiconductor device.

11. The invention according to claim 10, wherein said cermet coatings consist essentially of a mixture of chromium and silicon monoxide about 300 angstroms thick with a specific resistivity of 3 X 10 3 ohm-cm.

12. A microelectronic integrated circuit, comprising:

a. a body of semiconductor material including a collector region of a first conductivity type;

b. an annular base region of the opposite conductivity type from said first type diffused in said collector region and surrounding an inner collector region of said first conductivity type;

c. an emitter region of said first conductivity type diffused in a portion of said annular base region;

d. a layer of cermet material on at least a surface portion of said inner collector region and extending to opposite adjacent surface portions of said Annular base region;

e. said cermet material forming a Schottky barrier contact with said inner collector region and ohmic contact with said annular base region; and

f. a layer of conductive material on said cermet material.

13. The invention according to claim 12 and further including a layer of cermet material on said emitter region;

and a layer of conductive material on said last-mentioned cermet layer.

14. The invention according to claim 13, and further including a heavily doped collector contact region diffused in said collector region;

and a layer of cermet material followed by a layer of conductive material deposited on said collector contact region.

15. The invention according to claim 14, wherein said cermet layer consists essentially of 65 to 50% chromium and 35% to 50% silicon monoxide by weight.

16. The invention according to claim 14, wherein said cermet layer consists essentially of 60 to 40% silicon and 40 to 60% chromium by weight.