TRANSFORMER SYSTEM FOR ORTHOGONAL DIGITAL WAVEFORMS
First Claim
Patent Images
1. In combination:
- a plurality of computation units serially connected to each other, each of said computation units having an input and an output and being responsive to an input signal, the output of one of said computation units being coupled to the input of the next of said computation units for forming a transformation of an input signal coupled to said one computation unit, each of said computation units comprising;
means for storing a plurality of signals, arithmetic means connecting with an input of said computation unit and said storage means for extracting pairs of signals and forming arithmetic combinations of the signals of said pairs of signals, said arithmetic combinations being the sums and the differences of the signals of said pairs of signals, one signal of a pair of said pairs of signals being an input signal to said computation unit and the other signal of a pair of said pairs of signals being extracted from said storage means, and a feedback path coupling an output of said arithmetic means to an input of said storage means, said feedback path placing one of said arithmetic combinations in said storage means; and
means coupled to each of said computation units for coordinating said forming of said arithmetic combinations and said placing of said one arithmetic combination in said storage means in each of said computation units in accordance with a predetermined formulation to provide said transformation.
0 Assignments
0 Petitions
Accused Products
Abstract
A transformation system for transforming a set of input data samples into a set of output transform components, the transformation being based on the use of a set of orthogonal digitally generated waveforms analogous to the use of sinusoids in a Fourier spectral analysis. The transformation is accomplished by sequentially storing, summing, and subtracting selected data samples and combinations thereof to effect a matrix multiplication of the set of input data samples.
81 Citations
10 Claims
-
1. In combination:
- a plurality of computation units serially connected to each other, each of said computation units having an input and an output and being responsive to an input signal, the output of one of said computation units being coupled to the input of the next of said computation units for forming a transformation of an input signal coupled to said one computation unit, each of said computation units comprising;
means for storing a plurality of signals, arithmetic means connecting with an input of said computation unit and said storage means for extracting pairs of signals and forming arithmetic combinations of the signals of said pairs of signals, said arithmetic combinations being the sums and the differences of the signals of said pairs of signals, one signal of a pair of said pairs of signals being an input signal to said computation unit and the other signal of a pair of said pairs of signals being extracted from said storage means, and a feedback path coupling an output of said arithmetic means to an input of said storage means, said feedback path placing one of said arithmetic combinations in said storage means; and
means coupled to each of said computation units for coordinating said forming of said arithmetic combinations and said placing of said one arithmetic combination in said storage means in each of said computation units in accordance with a predetermined formulation to provide said transformation.
- a plurality of computation units serially connected to each other, each of said computation units having an input and an output and being responsive to an input signal, the output of one of said computation units being coupled to the input of the next of said computation units for forming a transformation of an input signal coupled to said one computation unit, each of said computation units comprising;
-
2. The combination defined by claim 1 further comprising means coupled to said coordinating means for indexing said sums and said differences, said indexing means comprising a counter and modulo-2 adder for combining outputs of individual cells of said counter.
-
3. In combination:
- a plurality of modules serially connected, the first one of said modules being responsive to a series of input quantities, the last one of said modules providing a series of output data quantities, each of said modules comprising;
an adder;
a subtractor; and
serial memory means interconnecting said adder and said subtractor, said serial memory means of successive ones of said modules providing overflows at the occurrences of sequences of data quantities, said sequences being of predetermined lengths such that said length of the sequence of one of said modules is one-half the length of the sequence of a preceeding one of said modules, the data quantities obtained from an adder and a subtractor of one of said modules being scaled by the same factor as the data quantities obtained from an adder and a subtractor of a second of said modules, said factor being unity; and
means operating in synchronism with each of said modules for providing an index value corresponding to each of said output data quantities.
- a plurality of modules serially connected, the first one of said modules being responsive to a series of input quantities, the last one of said modules providing a series of output data quantities, each of said modules comprising;
-
4. A combination as defined by claim 3 further comprising means for correlating the values of said sequences of data quantities provided by one of said modules with a reference.
-
5. In combination:
- a series of modules responsive to sequences of signals, there being 2n signals in one of said sequence of signals, there being n modules in said series of modules, each of said modules comprising;
an arithmetic unit responsive to said signals for combining such ones of said signals as are applied to said arithmetic unit;
means for delaying the application of certain ones of said signals to said arithmetic unit, the input of said delay means being coupled to the input of said module, the output of said delay means being coupled to said arithmetic unit; and
means for providing a sequence of said combined signals in a predetermined order, said sequence providing means being coupled to an output of said arithmetic unit;
said modules interconnected in an iterated format with the sequence of said combined signals provided by one of said modulEs applied to a second of said modules, the sequence providing means in each of said modules including means coupled to an input of said delaying means for recirculating a portion of said sequence through said delaying means, and the combining of signals in each of said modules being accomplished with a scaling of signals by the same factor, said factor being unity.
- a series of modules responsive to sequences of signals, there being 2n signals in one of said sequence of signals, there being n modules in said series of modules, each of said modules comprising;
-
6. The combination defined by claim 5 further comprising means for providing numerals for identifying signals in said sequence of combined signals of the nth module, said numeral providing means being coupled to sais sequence providing means, said numeral providing means comprising a counter and a modulo-2 adder for combining signals from a pair of cells of said counter.
-
7. A signal processing system comprising:
- means for sampling a signal at predetermined times;
means coupled to said sampling means for performing an orthogonal digital transformation of a group of said sampled signals by an orthogonal array of unitary factors to provide a set of products, said transformation performing means including a plurality of storage media coupled to said sampling means, said transformation performing means further including means coupled to said storage media for selectively recycling signals through one of said storage media while transmitting selected signals to another of said storage media, said recycling means comprising means coupled to said sampling means for forming sequences of signals in which all signals are scaled by a factor of unity; and
means for correlating each term of said set of products with a set of reference terms, said correlating means being coupled to said transformation performing means.
- means for sampling a signal at predetermined times;
-
8. The system as described by claim 7 further comprising means for modulating terms of said set of products in accordance with signals received from said correlator means, said modulating means being coupled to said transformation performing means.
-
9. The system as defined by claim 8 further comprising means responsive to said modulated terms for synthesizing therefrom an output signal, said synthesizing means being coupled to said modulating means.
-
10. In combination:
- a plurality of modules arranged serially for processing input signals arriving sequentially at a first one of said serially arranged modules, each of said modules having an input and an output, an output of one of said modules being connected to an input of a second of said modules, each of said modules forming combinations of pairs of signals at said input to provide at the output of a last one of said serially arranged modules a set of output signals orthogonally related to said input signals;
each of said modules comprising arithmetic means and delay means, means for alternately switching signals at said input to said delay means and said arithmetic means, means for coupling signals from an output of said delay means to said arithmetic means, and means for alternately directing sequences of output signals of said arithmetic means via a feedback path to said delay means and to an output of said module;
said arithmetic means forming the sums of signals and the differences of signals, said output signals of said arithmetic means having values equal to said sums and said differences, said directing means alternately interchanging said sum output signals and said difference output signals; and
said delay units in successive modules being of successively smaller delay to provide said orthogonal relationship.
- a plurality of modules arranged serially for processing input signals arriving sequentially at a first one of said serially arranged modules, each of said modules having an input and an output, an output of one of said modules being connected to an input of a second of said modules, each of said modules forming combinations of pairs of signals at said input to provide at the output of a last one of said serially arranged modules a set of output signals orthogonally related to said input signals;
Specification