SYSTEM FOR GENERATING THE FOURIER TRANSFORM OF A FUNCTION

• US 3,745,317 A
• Filed: 05/21/1971
• Issued: 07/10/1973
• Est. Priority Date: 05/04/1970
• Status: Expired due to Term

• Current Assignee: Daniel Berthier, Jacques Max, Jean-Marc Fauque
• Original Assignee: Daniel Berthier, Jacques Max, Jean-Marc Fauque
• Inventors: Berthier, Daniel, Fauque, Jean-Marc, Max, Jacques
• Primary Examiner(s): Gruber, Felix D.
• Application Number:
  US05/145,689
• Time in Patent Office: 781 Days
• Field of Search: 235/156,152,181,183,151.51,151.52,151.53 324/77A,77B
• US Class Current: 708/403
• CPC Class Codes: G06F 17/14 Fourier, Walsh or analogous domain transformations , e.g. Laplace, Hilbert, Karhunen-Loeve, transforms for correlation function computation G06F17/156; spectrum analysers G01R23/16
• CPC Class Codes: H05K 1/0269 for visual or optical inspection
• CPC Class Codes: H05K 2203/056 Using an artwork, i.e. a photomask for exposing photosensitive layers
• CPC Class Codes: H05K 2203/161 Using chemical substances, e.g. colored or fluorescent, for facilitating optical or visual inspection
• CPC Class Codes: H05K 3/4638 Aligning and fixing the circuit boards before lamination; Detecting or measuring the misalignment after lamination; Aligning external circuit patterns or via connections relative to internal circuits
• CPC Class Codes: H05K 3/4644 by building the multilayer layer by layer, i.e. build-up multilayer circuits making via holes in the insulating layers H05K3/0011; special circuit boards as base or core whereon the multilayer is built H05K3/4602
• CPC Class Codes: H05K 3/4679 Aligning added circuit layers or via connections relative to previous circuit layers

Abstract

A system generates the Fourier transform of a real function z (t) which is known in a time interval 2T and which is given in this interval in the form of N samples at equal time intervals Theta , i.e., in the form Z (p Theta ) in which p is an integer such that T/ Theta < OR = p < OR = T/ Theta . The product z (p Theta )x cos pi /T Kp Theta or the product z (p Theta ) X sin pi /T Kp Theta generated in the system is computed for values of the integer K increasing from 1 inclusive to T/ Theta inclusive. The sum of these successive products, is computed; each of the sums represents a sampling point of the harmonic at frequency K/2T of the Fourier transform.

Claims

1. A system for generating the Fourier coefficients of a real function z(t) which is generated in the form of N samples equally spaced by the interval Theta from t -T to t T in the form z(p Theta ) where p is an integer such that - T/ Theta <

p <

T/ Theta comprising a store unit (1) for storing N samples equally spaced by the interval Theta , of the function cos pi t/T from t -T to t T in the form cos pi p Theta /T;

a reader (2) connected to said store for reading out every Kth samples of the functions cos pi t/T, K being an integer increasing from 1 inclusive to T/ Theta inclusive, said reader and said store unit forming a further generator (3) of samples cos ( pi Kp Theta /T);

a multiplier (4) one of the inputs (4a) of which is connected to said generator of samples z(p Theta ) while the other of the inputs (4b) is connected to said generator (3) of samples cos ( pi Kp Theta /T);

said multiplier selectively forming the product of z(p Theta ) and cos ( pi Kp Theta /T);

an integrator (5) connected to said multiplier for summation of successive products each of the sums over p for which K is constant representing the Fourier coefficient associated with the frequency K/2T;

a switch (8) for rezeroizing said integrator (5) and a clock (9) for actuating said reader, said further generator, said multiplier and said switch.

2. A system according to claim 1, wherein the multiplier provides double amplitude and width modulation.

3. A system according to claim 1, wherein the integrater is an operational amplifier with a parallel connection of a capacitor and an electronic switch for rezeroising.

4. A system according to claim 1, wherein the function generator of sample Z(p Theta ) comprises a series of n field effect transistors, in parallel, said transistors being switched by units, tens, and hundreds signals, and delivering to a common output n voltages V0, V1 . . . Vn 1 corresponding to (n -1) cosine values evenly distributed between 0* and 180* and a divider which divides by (n-1) and which is fed by the synchronisation clock, a decimal counter connected to the output of said divider and delivering units, tens and hundreds pulses, three '"'"''"'"''"'"''"'"'AND'"'"''"'"''"'"''"'"' gates in parallel, their first input receiving the units, tens and hundreds pulses respectively from the counter, while their second input is connected to the synchronisation clock, and a parallel triple accumulator receiving the outputs of the three '"'"''"'"''"'"''"'"'AND'"'"''"'"''"'"''"'"' gates and delivering the accumulated units, tens and hundreds signals, the output of said dividers actuating said rezeroing switch.

5. A system according to claim 1, wherein the function generator comprises in series a cirCuit comprising in parallel a plurality of field-effect transistors, and resistors of predetermined values, said circuit receiving a reference voltage, and an amplifier shunted by a resistor having a predetermined value, said values of the resistor being selected so that the gain of the series system consisting of the parallel circuit and shunted amplifier increases by (n-1) successive increments in accordance with a cosine law and further includes a divider which divides by (n-1) and which is fed by the synchronisation clock, a decimal counter connected to the output of said divider and delivering units, tens and hundreds pulses, three '"'"''"'"''"'"''"'"'AND'"'"''"'"''"'"''"'"' gates in parallel, their first input receiving the units, tens and hundreds pulses respectively from the counter, while their second input is connected to the synchronisation clock, and a parallel triple accumulator receiving the outputs of the three '"'"''"'"''"'"''"'"'AND'"'"''"'"''"'"''"'"' gates and delivering the accumulated units, tens and hundreds signals.

6. A system for generating the Fourier coefficients of the real function Z(t) which is generated by a digital generator (110) in the form of N digital samples equally spaced by the interval Theta from t -T to t T in the form Z(p Theta ) where p is an integer such that -T/ Theta <

p <

+/ Theta comprising a digital store unit (120) for storing N digital samples equally spaced by the interval Theta , of the function cos pi t/T from t -T to t T in the form cos pi t Theta /T;

a reader connected to said digital store (120) for reading every Kth sample of the function cos pi t/T, K increasing from 1 inclusive to T Theta inclusive, said reader and said digital store unit (120) forming a further generator (112) of samples cos ( pi Kt Theta /T);

a digital multiplier (114) one of the inputs (A) of which is connected to said generator (110) of samples Z(p Theta ), while the other of the inputs (B) is connected to said generator (112) of samples cos ( pi Kp Theta /T) said digital multiplier (112) selectively forming the product of Z(t Theta ) and cos ( pi Kp Theta /T);

an integrator (116) connected to said multiplier (114) for summation of successive products, each of the sums over p for which K is constant being the Fourier coefficient associated with the frequency K/2T and a clock (118) for actuating said reader, said generators, said multiplier and said integrator.

7. A system as described in claim 6 for generating the Fourier coefficients of a real function Z(t), said digital generator (110) giving the function Z(t) including a digital store unit (152) for storing the digital values of the sampled function Z(p Theta ), a reader connected to the store unit (152) for reading out the contents of the store unit (152) in digital form, said clock (118) being connected to said reader connected to said digital store unit (152) and to said reader connected to said store unit (120) for synchronising the read out of the contents of the store units.

8. A system according to claim 7, wherein the first address generator includes a counter with provision for displaying K, an accumulator whose output defines the store address, and an adder coupled with the counter and accumulator, the adder adding the value K to the accumulator contents whenever a synchronising clock transmits a pulse to the counter and accumulator.