DIGITAL MAGNETIC COMPASS
First Claim
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1. A circuit for use with a compass having a digitally coded output indicative of the compass heading, said circuit comprising in combination:
- clock means for providing a train of timed signals;
first counter means for counting said train;
means for comparing the state of said first counter means with said coded output;
means for arresting the counting when said state of said first counter means bears a predetermined relationship to said coded output;
output means for providing an output signal determined by the state of said counter means after arrest of said counting, said output means comprising a second counter means connected for counting said train, and means for determining the state of said second counter;
said second counter being connected so that the count of said train therein is arrested by said means for arresting when the latter arrests the counting by said first counter means;
means for providing a signal corresponding to an arbitrary selected value, means for comparing the state of said second counter means with said signal corresponding to said arbitrary selected value; and
means for resetting said second counter means to a base counting state when the state of said second counter means bears a desired relationship to said selected value.
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Abstract
A magnetic compass in which the compass card and gimbal mounting are all located inside a sealed enclosure filled with damping fluid. The compass card is digitally coded and photoelectric means are provided for reading the card and generating a digital number corresponding to the rotational position of the card relative to the enclosure, corrected for local magnetic variation. Means are provided for comparing the compass reading with the corrected course reading to provide an error signal or an off-course alarm if desired.
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Citations
10 Claims
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1. A circuit for use with a compass having a digitally coded output indicative of the compass heading, said circuit comprising in combination:
- clock means for providing a train of timed signals;
first counter means for counting said train;
means for comparing the state of said first counter means with said coded output;
means for arresting the counting when said state of said first counter means bears a predetermined relationship to said coded output;
output means for providing an output signal determined by the state of said counter means after arrest of said counting, said output means comprising a second counter means connected for counting said train, and means for determining the state of said second counter;
said second counter being connected so that the count of said train therein is arrested by said means for arresting when the latter arrests the counting by said first counter means;
means for providing a signal corresponding to an arbitrary selected value, means for comparing the state of said second counter means with said signal corresponding to said arbitrary selected value; and
means for resetting said second counter means to a base counting state when the state of said second counter means bears a desired relationship to said selected value.
- clock means for providing a train of timed signals;
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2. A circuit as defined in claim 1 including means for starting the count of said signals in said first counter means.
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3. A circuit as defined in claim 2 wherein said means for starting the count is operated manually.
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4. A circuit as defined in claim 1 wherein said means for starting the count is a second clock providing signals at a repetition rate slower than the repetition rate of said train.
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5. A circuit as defined in claim 1 wherein said output means comprises means for displaying, in decimal form, said output signal.
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6. A circuit as defined in claim 1 wherein said means for arresting comprises gate means for coupling an output signal from said means for comparing the state of said first counter means to said clock means so as to stop the latter, a bistable device having one output thereof connected so as to enable said gate means, and having a pair of input terminals, one of said input terminals being connected to said means for comparing the state of said second counter means so as to be energized by the last-named means when the state of said second counter means bears said relationship to said selected value such that said bistable device enables said gate means, the other input terminal of said bistable device being connected to a source of an input state signal and to said clock means such that a start signal from said source starts said clock means and causes said bistable device to disable said gate means.
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7. A circuit as defined in claim 1 wherein said second counter means is a reversible counter, and including means for reversing the direction of count in said second counter means wheNever the state of said second counter means reaches a predetermined value.
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8. A circuit as defined in claim 7 wherein said means for reversing is only becomes operative responsively to the resetting of said second counter upon determination that the state of said counter bears said desired relationship to said selected value.
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9. A circuit as defined in claim 1 wherein said predetermined value of said second counter means is the equivalent of the decimal value 180.
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10. A circuit as defined in claim 1 including means for alternatively presetting either of said counter means to an arbitrary selected value prior to counting.
Specification