PULSE PROCESSING SYSTEM

• US 3,747,001 A
• Filed: 02/17/1972
• Issued: 07/17/1973
• Est. Priority Date: 02/17/1972
• Status: Expired due to Term

• Current Assignee: George E. Fasching, George H. Patton
• Original Assignee: George E. Fasching, George H. Patton
• Inventors: Fasching, George E., Patton, George H.
• Primary Examiner(s): Huckert, John W.
• Assistant Examiner(s): Hart, Ro E.
• Application Number:
  US05/227,172
• Time in Patent Office: 516 Days
• Field of Search: 307/265,266,267 328/58,14,41,104,115,116
• US Class Current: 327/33
• CPC Class Codes: G01T 1/208 Circuits specially adapted for scintillation detectors, e.g. for the photo-multiplier section

Abstract

A pulse counting system with improved energy resolution is disclosed having dual channels for pulse processing at different rates and a pulse pileup detector to select which channel is utilized. Pulse input is delayed until the pileup detector can determine if any pulse is so closely followed in time by a second pulse to constitute pulse pileup. If no pulse pileup is detected, the slower channel is selected. The slow channel clips the pulse to a relatively wide pulse width to retain good energy resolution. If pulse pileup is predicted, the fast channel with correspondingly shorter pulse width is selected to improve resolution in respect to time. The output of the two channels are transmitted to a pulse height analyzer for interpretation.

Claims

1. An improved pulse processing system for use in combination with a pulse height analyzer comprising:

A. a first processing channel for shortenign input pulses to a first pulse width;

B. a second processing channel in electrical parallel with said first channel for shortening input pulses to a second pulse width having a shorter duration than said first pulse width;

C. pulse pileup detector means for selecting the output of said first channel during intervals of time having no pulse pileup and for selecting the output of said second channel during time intervals having pulse pileup and for transmitting said selected output to said pulse height analyzer D. electrical means for delaying said input pulse signal are connected to the input of said first and second pulse processing channels whereby said pulse pileup detector means is permitted preexamination of input pulse signals.

2. The improvement according to claim 1 wherein voltage source means for stabilizing the output of said first pulse processing channel is provided in combination with said pulse processing system.

3. The improvement according to claim 1 wherein first and second gates are connected to the corresponding outputs of both said first and said second processing channels, said gates being controlled by said pulse pileup means for selecting the output of either said first or said second processing channel.

4. The improvement according to claim 3 wherein pulse stretching means are provided within both said first and second gates to extend the output pulse width.

5. The improvement according to claim 4 wherein said pulse stretching means are each provided with a feedback output means for signaling said pulse pileup means whenever a pulse is present within the corresponding gate to prevent change of channels during a pulse signal.

6. The improvement according to claim 1 wherein said pileup detector includes pulse sorting means for accepting only those pulses having a pulse height within a preselected range of interest.

7. The improvement according to claim 1 wherein double delay line amplifiers are provided at the output of said first and second pulse processing channels to produce bipolar pulse signals to said pulse height analyzer.

8. A method of proceSsing an input pulse signal to a pulse height analyzer comprising:

a. transmitting said pulse signal in parallel to a pulse pileup detector, a first pulse processing channel and a second pulse processing channel;

b. detecting whether more than one input pulse occurs within a preselected coincidence time to constitute pulse pileup and transmitting and output from said pulse pileup detector to each of said pulse processing channels in response thereto;

c. clipping each pulse of said input pulse signal to a first pulse width within said first pulse processing channel;

d. clipping each pulse of said input pulse signal to a second pulse width within said second pulse processing channel, said second pulse width being of shorter duration than said first pulse width; and

e. transmitting the output of said first pulse processing channel to said pulse height analyzer when pulse pileup is not detected and the output of said second pulse processing channel to said pulse height analyzer when pulse pileup is detected.

9. The method of claim 8 wherein input pulses of less than a preselected pulse height threshold are rejected by both said first and second channels.