MEMORY SYSTEM WITH TEMPORARY OR PERMANENT SUBSTITUTION OF CELLS FOR DEFECTIVE CELLS

• US 3,755,791 A
• Filed: 06/01/1972
• Issued: 08/28/1973
• Est. Priority Date: 06/01/1972
• Status: Expired due to Term

• Current Assignee: Luis Maria Arzubi
• Original Assignee: Luis Maria Arzubi
• Inventors: Arzubi, Luis Maria
• Primary Examiner(s): Konick, Bernard
• Assistant Examiner(s): Hecker, Stuart N.
• Application Number:
  US05/258,572
• Time in Patent Office: 453 Days
• Field of Search: 340/173R,172.5,173FF
• US Class Current: 365/200
• CPC Class Codes: G11C 29/789 using non-volatile cells or latches

Abstract

A memory storage system comprising both a main memory array and an alternate storage memory array coupled by a circuit that can either semipermanently or reversibly substitute the alternate array for a portion of the main array and retain the alternate array in its substituted position even when the memory is in a power down condition. The described circuit achieves this by utilizing nonvolatile semiconductor devices arranged in a cross coupled configuration that can, if desired, be made to either temporarily or semipermanently substitute the alternate array for any desired portion of the main array.

Claims

1. A memory storage system comprising:

a memory storage array containing storage locations, a memory address register for selecting a storage location in said memory storage array, input signal means for providing an input signal to said array, said array comprising a plurality of functionally isolated individual storage locations electrically interconnected into a main storage group and a redundant storage line a circuit coupled to the main storage group and to the redundant storage line said circuit having a first state for directing an input signal from said input signal means to a selected storage location in said main storage group and a second state for redirecting the input signal from the selected storage location in said main storage group to the redundant storage line whenever the main storage group to which the circuit is coupled contains a defective storage location, and biasing means coupled to said circuit for setting said circuit in one of said states, said circuit containing non-volatile, variable threshold devices that can be set to turn on at a selected input voltage.

2. The system of claim 1 wherein there is further provided first means for applying a first voltage to said circuit for setting the threshold of one of said non-volatile, variable threshold devices to cause said circuit to be latched into one of said states.

3. The system of claim 2 wherein there is further provided second means for applying a second voltage to said circuit for unlatching said circuit from the state in which it is set and relatching said circuit in the other of said states.

4. The system of claim 2 wherein said main storage group is divided into a plurality of portions and each portion has a circuit coupled thereto which circuit is also coupled to said redundant storage line.

5. A memory system comprising a memory storage array containing main storage and alternate storage locations, input signal means for providing an input signal to said array, switching means having a first output coupled to said main storage locations, a second output coupled to said alternate storage locations and an input coupled to said input signal means, and control means coupled to said switching means for controlling said switching means to selectively switch the input signal from one of said outputs to the other of said outputs.

6. The system of claim 5 wherein said control means includes a circuit having a first state and a second state.

7. The system of claim 6 wherein said circuit includes non-volatile devices that can semipermanently latch the circuit in one of said states.

8. The system of claim 7 wherein said control means further includes means for applying a first voltage condition to said circuit for setting said circuit into one of said states and for applying a second voltage condition to said non-volatile devices to semipermanently latch the circuit into the state in which it has been set.

9. The system of claim 7 wherein said non-volatile devices comprise metal-nitride-oxide semiconductors.