METHOD FOR BATCH FABRICATING SEMICONDUCTOR DEVICES

• US 3,757,414 A
• Filed: 03/26/1971
• Issued: 09/11/1973
• Est. Priority Date: 03/26/1971
• Status: Expired due to Term

• Current Assignee: Hans W. Keller
• Original Assignee: Hans W. Keller
• Inventors: Keller, Hans W.
• Primary Examiner(s): Lanham, Charles W.
• Assistant Examiner(s): Tupman, W.
• Application Number:
  US05/128,420
• Time in Patent Office: 900 Days
• Field of Search: 29/580,583,589,576S
• US Class Current: 438/53
• CPC Class Codes: G01L 9/0042 Constructional details associated with semiconductive diaphragm sensors, e.g. etching, or constructional details of non-semiconductive diaphragms details about the integration or bonding of piezoresistor in or on the diaphragm G01L9/0052 and G01L9/0057 respectively
• CPC Class Codes: H01L 21/00 Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
• CPC Class Codes: H01L 24/80 Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
• CPC Class Codes: H01L 29/84 controllable by variation of applied mechanical force, e.g. of pressure
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/01322 Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/19043 being a resistor
• CPC Class Codes: Y10T 29/49082 Resistor making

Abstract

A method for batch fabricating semiconductor stress sensors having the semiconductor material diaphragm rigidly joined to a support flange made of the same semiconducting material. Two processed silicon slices, one to form diaphragms and the other to form support flanges, are rigidly joined. The joined slices are then partitioned to form individual stress sensors.

Claims

1. A method for batch fabricating semiconductor material stress sensors comprising:

forming diaphragms by recessing at selected locations through a first major surface of a first wafer of said semiconductor material, forming electrical elements in said diaphragms, bonding a second wafer of said semiconductor material to said first wafer, and partitioning said joined wafers to form said stress sensors.

2. The method of claim 1 wherein said bonding is accomplished by:

forming access holes through said second wafer located to correspond to said diaphragms in said first wafer, and bonding said wafers together such that said access holes substantially overlap said diaphragms.

3. The method of claim 1 wherein said bonding is accomplished by:

bonding said second wafer to said first wafer, and forming access holes through said second wafer located to correspond to said diaphragms in said first wafer.

4. The method of claim 1 wherein said forming of diaphragms is accomplished by:

masking said first major surface of said first wafer with a first masking material which resists a first selected etching agent, exposing said first major surface at said selected locations, and applying said first etching agent capable of etching said semiconductor material to said masked and exposed first major surface until said recesses are formed.

5. The method of claim 1 wherein said forming of diaphragms is accomplished by machining.

6. The method of claim 1 wherein said forming of electrical elements is accomplished through a surface of said diaphragms defining the depth of said recesses.

7. The method of claim 1 wherein said forming of electrical elements is accomplished through a surface of said diaphragms opposite a surface defining the depth of said recesses.

8. The method of claim 1 wherein said bonding is accomplished with said second wafer attached to said first major surface.

9. The method of claim 2 wherein said forming of access holes is accomplished by:

masking a second major surface of said second wafer with a masking material which resists a selected etching agent, exposing said second major surface at said corresponding locations, and applying said etching agent capable of etching said semiconductor material to said masked and exposed second major surfaces until said access holes are formed.

10. The method of claim 2 wherein said forming of access holes is accomplished by machining.

11. The method of claim 2 wherein said bonding is accomplished with said second wafer attached to a surface of said first wafer on the side opposite said first major surface.

12. The method of claim 4 wherein said bonding is accomplished by:

using as said masking material a material capable of forming an eutectic bond between surfaces of said semiconducting material, and attaching said second wafer to said recessed first major surface by an eutectic bond.

13. The method of claim 4 wherein said forming of access holes and said bonding is accomplished by:

masking said second major surface of said second wafer with a second masking materiAl which resists a second selected etching agent, exposing said second major surface at said corresponding locations, applying said second etching agent capable of etching said semiconductor material to said masked and exposed second major surface until said access holes are formed, using as said first and second selected masking materials those materials capable of forming an eutectic bond between surfaces of said semiconducting material masking with either said first or second selected masking materials, and attaching said second wafer to said recessed first major surface by an eutectic bond.

14. The method of claim 9 wherein said bonding is accomplished by:

using as said masking material a material capable of forming an eutectic bond between surfaces of said semiconducting material, and attaching said first wafer to said second major surface with said access holes by an eutectic bond.

15. A method for batch fabricating semiconductor material stress sensors comprising:

forming sets of electrical elements in a first wafer of said semiconductor material at selected locations through a first major surface of said first wafer, forming diaphragms each containing a said set of electrical elements by recessing through a second major surface of said first wafer opposite said first major surface, bonding a second wafer of said semiconductor material to said first major surface, and partitioning said joined wafers to form said stress sensors.

16. A method for batch fabricating semiconductor material stress sensors comprising:

forming diaphragms by recessing at selected locations through a first major surface of a first wafer of said semiconductor material, forming electrical elements in said diaphragms, partitioning said first wafer into individual diaphragms, partitioning a second wafer of said semiconductor material into pieces corresponding to said individual diaphragms, and bonding said individual diaphragms and said corresponding pieces together.