ELECTRONIC COMBINATION LOCK

• US 3,766,522 A
• Filed: 08/10/1972
• Issued: 10/16/1973
• Est. Priority Date: 08/10/1972
• Status: Expired due to Term

• Current Assignee: Lawrence C. Marsh
• Original Assignee: Lawrence C. Marsh
• Inventors: Marsh, Lawrence C.
• Primary Examiner(s): Yusko, Donald J.
• Application Number:
  US05/279,642
• Time in Patent Office: 432 Days
• Field of Search: 340/147R,147MD,164R,365S,149R
• US Class Current: 340/5.54
• CPC Class Codes: G07C 9/0069 actuated in a predetermined sequence

Abstract

An electronic combination lock includes an entry bank comprising a plurality of multistage registers interconnected with a plurality of pushbutton switches so that a combination number entered by actuation of the switches is progressively shifted through the various registers. Certain stages of the registers are interconnected through logic gate means so that if the combination is properly entered a controlled device such as a door unlocking solenoid is energized. In another embodiment a memory bank comprising second plurality of multistage registers are interconnected with the pushbutton switches and permit through actuation of memory/entry switch means the programming of the memory bank for a particular combination. The output of the respective ones of the shift registers in the memory bank are compared with respective ones of the shift registers in the entry bank and if, after the entry of the combination code number, registers of the entry and memory bank are identical, the controlled device is energized.

Claims

1. An electronic combination lock circuit for actuating a control device in response to operator entry of a predetermined combination code number comprising:

a plurality of manually actuable switch means connected in parallel with each other and to a source of direct current potential, each of said switch means bearing indicia corresponding to a different digit, a plurality of shift register means, means connecting respective ones of said switch means with the data input of respective ones of said shift register means, OR function performing gate means interconnecting each of said switch means with the clock input of each of said shift register means whereby each of said shift register means is toggled in response to actuation of any of said switch means, AND function performing means having a number of inputs corresponding to the number of digits in said combination code number, respective ones of said inputs connected with the output of particular stages of said shift registers depending on the length and sequence of said combination code number, said AND function performing means developing a control signal for actuating said controlled device only when said switch means are actuated in sequence corresponding to said combination code number.

2. An electRonic combination lock circuit for actuating a control device in response to operator entry of an operator assigned combination code comprising:

a plurality of manually actuable switch means connected in parallel with each other and to a source of direct current potential, an entry bank and a memory bank comprising a first and second plurality of shift register means respectively, first gate means connecting each of said switch means to the clock input of each of said first plurality of shift register means and connecting respective ones of said switch means to the data input of respective ones of said first plurality of shift register means, second gate means connecting each of said switch means to the clock input of each of said second plurality of shift register means and connecting respective ones of said switch means to the data input of respective ones of said second plurality of shift register means, memory/entry switch means connected with each of said first and second gate means, said memory/entry switch means being actuable from an entry position opening said first gate means and closing said second gate means to a memory position closing said first gate means and opening said second gate means, comparator means for comparing the output of respective ones of said first plurality of shift register means with the respective ones of said second plurality of shift register means and for developing a control signal for actuating said control device only when the outputs of said first and second shift register means are identical.

3. An electronic combination lock circuit for actuating a control device in response to operator entry of an operator assigned combination code comprising:

a plurality of pushbutton switch means connected in parallel with each other and to a source of direct current potential, each of said pushbutton switch means bearing an identifiable digit, a memory bank comprising a plurality of shift registers, an entry bank comprising a plurality of shift registers, AND function performing gate means connecting respective ones of said switch means with the data input of respective ones of said shift register means in said memory bank, second AND function performing gate means connecting respective ones of said switch means with the data input of respective ones of said shift registers in said entry bank, first OR function performing gate means connecting the output of each of said first AND function performing means with the clock input of each shift register means in said memory bank, second OR function performing gate means connecting the output of each of said second AND function performing means with the clock input of each shift register means in said entry bank, memory/entry switch means actuable from an entry position closing said first AND function performing gate means and opening said second AND function performing gate means, to a memory position opening said first AND function performing gate means and closing said second AND function performing gate means, a plurality of comparator means for comparing the output of respective ones of said shift registers in said entry bank with respective ones of said shift registers in said memory bank and for developing a control signal for actuating said control device only when the outputs of respective shift registers in said entry bank are identical with the outputs of respective registers in said memory bank.