MULTIPROCESSING SYSTEM HAVING MEANS FOR PERMISSIVE COUPLING OF DIFFERENT SUBSYSTEMS

• US 3,768,074 A
• Filed: 05/12/1972
• Issued: 10/23/1973
• Est. Priority Date: 05/12/1972
• Status: Expired due to Term

• Current Assignee: Unisys Corporation
• Original Assignee: Hans P. Birchmeier, Richard S. Sharp
• Inventors: Sharp, Richard S., Birchmeier, Hans P.
• Primary Examiner(s): Zache, Raulfe B.
• Application Number:
  US05/252,890
• Time in Patent Office: 529 Days
• Field of Search: 340/172.5
• US Class Current: 710/100
• CPC Class Codes: G06F 11/2023 Failover techniques
• CPC Class Codes: G06F 11/2035 without idle spare hardware
• CPC Class Codes: G06F 15/177 Initialisation or configuration control processor initialisation G06F9/4405

Abstract

This disclosure relates to a multiprocessing system including two or more processing units, I/O control units and so forth which are arranged in independent processing groups. Each of the processing groups is provided with a representative means to receive a system configuration code which specifies the particular subsystem to which that processing group is to be joined. The representative means transmits its code to the corresponding representative means of the other processing groups and receives codes of the other processing groups in return. Processing groups having the same code are then interconnected as a subsystem. If a processing group is not available, it does not transmit its code to the other processing groups and, thus, is not recognized by the other processing groups. In this manner, the respective subsystems are permissively formed of only those active processing groups which are available.

Claims

1. A multiprocessing system comprising:

a plurality of processing groups, each group including a processing unit and an I/O control unit;

a plurality of control buses one for each processing group, each bus being coupled to each unit of the respective processing group; and

a control bus interconnection unit to selectively couple any control bus to any of the other control buses;

each of said processing group further including representative means coupled to each unit of that processing group, said representative means being also coupled to said control bus interconnection unit to receive a system configuration code representing a system to which that processing group is to be coupled, said respective representative means being coupled to one another to transmit such codes to the representative means of the other processing groups when said each of said processing groups is available to be coupled to the designated system.

2. A system according to claim 1 wherein:

each of said representative means includes a plurality of interface units each coupled to a corresponding interface unit in one of the other representative means.

3. A multiprocessing system according to claim 2 wherein:

each of said interface units includes a comparison means to receive a system configuration code from a corresponding representative means of another unit for comparison with the system code of the current processing group.

4. A multiprocessing system according to claim 3 wherein:

each interface unit includes means to generate and transmit to the other interface unit to which it is coupled a validation signal representing a comparison between system codes.

5. A multiprocessing system according to claim 4 wherein:

each interface unit includes means to generate a system code error when the respective system codes do not compare.

6. A muliprocessing system according to claim 5 wherein:

each interface unit includes means to generate a validation error signal when a validation signal has not been received from the corresponding interface unit of another representative means and also when a validation signal has not been specified by the current interface unit.

7. A data processing system comprising:

a plurality of units coupled to one another for the transfer of information signals; and

a source of system configuration codes;

each of said units including a representative means to receive a system configuration code representing a particular system to which that unit is to be assigned and to transmit that code to the other units of the system when said unit is available for connection in the system.

8. A system according to claim 7 wherein:

each of said units is a processing unit including its corresponding representative means.

9. A system according to claim 8 wherein:

each of said representative means includes a plurality of interface units each adapted for coupling to a corresponding interface unit in one of the other representative means.

10. A multiprocessing system comprising:

a plurality of processing groups coupled to one another, each group including a processing unit and an I/O control unit;

each of said processing groups further including representative means to receive a system configuration code representing a system to which that processing group is to be coupled and to transmit such codes to the representative means of the other processing groups when said each of said processing groups is available to be coupled to the designated system.

11. A system according to claim 10 wherein:

each of said representative means includes a plurality of interface units each coupled to a corresponding interface unit in one of the other representative means.

12. A multiprocessing system according to claim 11 wherein:

each of said interface units includes a comparison means to receive a system configuration code from a corresponding representative means of another unit for comparison with the system code of the current processing group.