BINARY EXPLOSIVE LOGIC NETWORK

• US 3,768,409 A
• Filed: 11/10/1972
• Issued: 10/30/1973
• Est. Priority Date: 11/10/1972
• Status: Expired due to Term

• Current Assignee: Fredric L. Menz, Stephen L. Redmond
• Original Assignee: Fredric L. Menz, Stephen L. Redmond
• Inventors: Redmond, Stephen L., Menz, Fredric L.
• Primary Examiner(s): Borchelt, Benjamin A.
• Assistant Examiner(s): Jordan, C. T.
• Application Number:
  US05/305,642
• Time in Patent Office: 354 Days
• Field of Search: 102/7.2R,22,DIG.2
• US Class Current: 102/275.9
• CPC Class Codes: F42D 1/042 Logic explosive circuits, e.g. with explosive diodes

Abstract

An explosive logic network with two inputs wherein initiation of either the first input, the second input or the first and second inputs simultaneously results in a first output, a second output or a third output, respectively.

Claims

1. An explosive logic element comprising:

first and second inputs;

a first and second explosive path extending from said first input;

said first path being shorter than said second path;

said first path terminating at an explosive null gate;

said second path passing through an explosive diode and branching off into third, fourth and fifth explosive paths;

said fourth path passing through a second explosive diode in a reverse direction and thereby terminating;

said third path terminating at said explosive null gate where said first path terminated; and

said fifth path extending across a destructive crossover and branching into sixth and seventh explosive paths;

said seventh path being longer than said sixth path and said sixth and seventh paths crossing each other at a destructive crossover whereby said sixth path reaches a first output and said seventh path is terminated at said second explosive crossover.

2. The device of claim 1 further comprising:

a second input said second input branching into an eighth explosive path and into said fourth explosive path;

said eighth explosive path terminating at a second explosive null gate and said fourth explosive path passing through said second explosive diode and branching into said second, third and fifth paths;

said second path passing through said first explosive diode in a reverse manner and thereby terminating;

said third path terminating at a second output;

whereby introduction of a detonation wave into said first input results in an output at said first output, introduction of a detonation wave into said second input results in an output at said second output and a simultaneous introduction of a detonation wave into said first and second input results in a third distinct output.