CATHODE RAY TUBE STROKE WRITING USING DIGITAL TECHNIQUES

• US 3,775,760 A
• Filed: 04/07/1972
• Issued: 11/27/1973
• Est. Priority Date: 04/07/1972
• Status: Expired due to Term

• Current Assignee: Lyle R. Strathman
• Original Assignee: Lyle R. Strathman
• Inventors: Strathman, Lyle R.
• Primary Examiner(s): Trafton, David L.
• Application Number:
  US05/242,024
• Time in Patent Office: 599 Days
• Field of Search: 340/324A 315/18
• US Class Current: 345/18
• CPC Class Codes: G09G 1/10 the deflection signals being produced by essentially digital means, e.g. incrementally

Abstract

A digitally controlled stroke writing system for displaying a selected imagery on a cathode ray tube defines the imagery as a sequence of straight line strokes of predetermined length and line slope. Each stroke is comprised of plural clock rate defined segments and is commanded by a five-bit binary stroke command word respective bits of which selectively command beam deflection up, down, left, right and video on/off. A pair of binary counters to which a clock defined pulse train is available are caused to count up, down, or hold in response to applied up-down and leftright stroke command word bits, respectively, and develop respective moving digital deflection codes definitive of horizontal and vertical beam deflections. Digital-to-analogue conversion of the running digital deflection codes provides beam deflection signals, while the video on/off command bits of the five-bit binary stroke command words simultaneously control cathode ray tube beam blanking to permit stroke retrace segments within the stroke sequence with maintenance of uniform image brightness. Sloped stroke lines may be selectively defined by control of the ratio of repetition rates of the clock defined pulse trains applied to the respective binary counters.

Claims

1. A digitally controlled stroke writing system for writing a selected display format on a cathode ray tube, said format being predefined as a sequential plurality of straight line strokes each of an individually predetermined length and line slope, comprising, means for defining each of said straight line strokes as a five-bit binary command word, the binary state of first and second bits of said command word defining respective cathode ray tube beam deflection command increments of left and right, the binary state of second and third bits of said command word defining respective cathode ray tube beam deflection command increments of up and down, the binary state of the fifth bit of said command word defining cathode ray tube beam on-off command;

a master clock source of predetermined repetition rate, first and second binary up/down counting means, means for gating a clock defined pulse train to said first binary up/down counter under control of said first and second bits of sequential ones of said five-bit stroke command words, means for gating a clock defined pulse train to said second binary up/down counter under control of said third and fourth bits of said five-bit stroke command words, means for controlling the generation of said cathode ray tube beam as a function of said fifth bit of said five-bit binary stroke command words, means converting the binary count in each of said up/down counters to respective horizontal and vertical analog beam deflection signals, means effecting cathode ray tube beam deflection in response to said analogue deflection signals;

the slope of successive ones of said straight line strokes being established by means establishing said clock defined pulse train repetition rates to define a predetermined ratio of the repetition rate of the clock defined pulses applied to said respective ones of said binary up/down counters to the repetition rate of said master clock source.

2. A digitally controlled stroke writing system for writing a selected display format on a cathode ray tube, said format being predefined as a sequential plurality of straight line strokes each of an individually predetermined length and line slope, comprising, means for defining each of said straight line strokes as a five-bit binary command word, the binary state of first and second bits of said command word defining respective cathode ray tube beam deflection command increments of left and right, the binary state of second and third bits of said command word defining respective cathode ray tube beam deflection command increments of up and down, the binary state of the fifth bit of said command word defining cathode ray tube beam on-off command;

a master clock source of predetermined repetition rate, first and second binary up/down counting means, means for gating a clock defined pulse train to said first binary up/down counter under control of said first and second bits of sequential ones of said five-bit stroke command words, means for gating a clock defined pulse train to said second binary up/down counter under control of said third and fourth bits of said five-bit stroke command words, means for controlling the generation of said cathode ray tube beam as a function of said fifth bit of said five-bit binary stroke command words, means converting the binary count in each of said up/down counters to respective horizontal and vertical analog beam deflection signals, means effecting cathode ray tube beam deflection in response to said analogue deflection signals;

master timing means receiving said master clock source signal and including binary counting means responsive to said master clock signal to develop a first binary output predetermined least significant bits of which comprIse a moving digital deflection code definitive of a horizontal deflection command for effecting successive character positions on one of a plurality of character lines, and a second binary output predetermined successive least significant bits of which comprise a moving digital deflection code definitive of a vertical deflection command for effecting line position, further digital-to-analogue conversion means receiving said first and second said binary count outputs from said master timing means and developing respective further analogue horizontal position and vertical position deflection signals, and means for controlling the horizontal and vertical deflection of said cathode ray tube beam in accordance with said further horizontal and vertical position deflection signals;

whereby successive ones of said characters are written in a line-page format.

3. A digitally controlled stroke writing system for displaying a selected imagery on a cathode ray tube, said imagery being predefined as a sequential plurality of straight line strokes each of predetermined length and slope, comprising, a master clock source, digital memory means including addressable binary stroke word storage for each of said predetermined number of strokes, means under control of said clock source to address for sequential read-out of each of said predetermined number of binary stroke words;

each said stroke word being defined as a five-bit binary word, the binary state of first and second bits of each said stroke word defining respective cathode ray tube beam deflection command increments of left and right, the binary state of second and third bits of each said stroke word defining respective cathode ray tube beam deflection command increments of up and down, and the binary state of the fifth bit of each said stroke word defining cathode ray tube beam on-off command, each of said stroke word bits being of a time duration defined by a predetermined number of pulses the repetition rate of which is a predetermined function of said clock source repetition rate;

a first binary up/down counter, means for controlling the application of first ones of said time duration defining pulses to said first binary counter as a function of said first and second bits of said binary stroke words;

a second binary up/down counter, means for controlling the application of second ones of said time duration defining pulses to said second binary counter as a function of said third and fourth bits of said binary stroke words;

digital-to-analogue converter means responsive to the count in each of said binary counters to develop respective horizontal and vertical cathode ray tube deflection signals; and

video blanking means responsive to the binary state of said fifth bit of said binary stroke words to effect cathode ray tube beam on-off control;

said selected imagery comprising a plurality of m alphanumeric characters in a display format defined by a predetermined number of character positions on each of a predetermined number of display lines;

said system further comprising a master clock timing means, said master clock timing means receiving the output of said master clock source as a control input thereto and being comprised of a plurality of cascaded binary dividing means successive ones of which produce operational output wave forms to effect said sequential readout from said digital memory means of stored sequential strokes for each of successive ones of said plurality of alphanumeric characters to be displayed and binary outputs defining character and line position;

further horizontal and vertical beam positioning means responsive to said character and line position master timing means outputs to effect beam positioning for the start of sequential stroke sequences defining successive characters to be written and successive lines upon which predetermined sequences of characters are to be written; and

said master timing means further comprising outputs for application to said cathode ray tube to effect blanking of said cathodE ray tube beam during beam positioning between successive characters on a line, between successive lines of said display, and during beam retrace between the last of said plurality of lines to be displayed and the initial starting position for a subsequent stroke writing sequence.

4. A stroke writing system as defined in claim 3 wherein said timing pulses as applied to said first and second binary up/down counters comprise pulse trains of like repetition rate, said sequential strokes defining each of said alphanumeric characters to be displayed comprised of a predetermined sequence of vertical, horizontal and 45* inclined straight line strokes.

5. A stroke writing system as defined in claim 4 wherein said master timing means comprises means to effect predetermined delay of said timing pulses as applied to said first and second binary up/down counters, said delay being effective to permit the final stroke of a character to be displayed prior to said cathode ray beam being repositioned to a position defining the start of a succeeding character to be displayed.

6. A stroke writing system as defined in claim 5 wherein said system has a character writing capability of 64 characters, each of said characters being defined by a stroke sequence not in excess of 24 strokes, each stroke comprising a time duration defined by three of said timing pulses, said digital memory means including address means to define each successive character to be written as one of 64 6-bit binary character address words, said display including provision for 16 character writing spaces per line on each of 13 lines, said binary memory means including read-only memory means, means for collectively addressing said read-only memory means by said 6 bit character addressing words and a sequencing control readout from said master timing means, whereby 24 5-bit stroke segment command words are sequentially read out from said read-only memory means in a predetermined sequence individually defined by each one of said 6-bit character addressing words applied thereto, said read-only memory having a storage requirement of 1,536 5-bit stroke command words addressable in selected sequences of 24 words each, said master timing means comprising a first divide-by-three substroke binary counter receiving the output from said master clock, a second divide-by-three binary counter receiving the output from said first divide-by-three counter and including logic means for developing first, second and third time multiplexed sequential outputs for addressing said read-only memory, the most significant bit output of said second divide-by-three counter being applied to a divide-by-10 counter, the three least significant bit outputs of said divide-by-10 counter being applied as addressing inputs to said read-only memory, means for delaying the most significant bit output of said divide-by-10 counter by said predetermined delay, means for gating said clock pulses to said first and second binary up/down counters under control of the output of said means for delaying, a divide-by-18 counter receiving the output from said means for delaying the four least significant bit outputs from said divide-by18 counter being applied to a further digital-to-analogue conversion means the output of which develops a horizontal position beam deflection signal for beam positioning between successive characters to be displayed, the most significant bit output of said divide-by-18 counter being applied to a divide-by-14 counter, respective successive significant bit outputs from said divide-by-14 counter including the least significant bit output thereof being applied to a still further digital-to-analogue conversion means the output of which develops a vertical position beam deflection signal for beam position between successive lines of characters to be displayed, the respective bit outputs from said divide-by-14 counter beIng additionally applied to said memory means to effect a display synchronized line memory output control therein, means utilizing the most significant bit output from said divide-by-18 counter to effect horizontal retrace blanking of said cathode ray tube, and means responsive to the most significant bit output of said divide-by-14 counter to effect vertical retrace blanking of said cathode ray tube beam.

7. A method of digitally controlling cathode ray tube stroke writing comprising the steps of:

defining the format to be displayed on said cathode ray tube as a sequence of straight line strokes of n increments each of a preassigned line slope, storing each of said straight line strokes as a 5-bit binary command word individual bits of which define respective plus or minus vertical deflection increments, plus or minus horizontal deflection increments, and beam on-off control in accordance with a predetermined binary state of respective individual ones of said 5 bits, reading out said plus or minus vertical deflection increment bits and said plus or minus horizontal deflection increment bits to respective first and second binary up/down counters to establish count up, count down, and count hold commands thereto, causing said binary up/down counters to count when so commanded at respective count rates derived from a master clock, which clock defines said n increments per straight line stroke, with an associated ratio of said respective count rates defining said preassigned line slopes for each successive line stroke, converting the binary count in each of said up/down counters to respective analogue cathode ray tube beam deflection signals, and applying said respective analogue cathode ray tube beam deflection signals, and said beam on/off command signals to said cathode ray tube to control the generation and deflection of said cathode ray tube beam as a composite function thereof.