HYBRID DATA COMPRESSION

• US 3,784,737 A
• Filed: 01/12/1973
• Issued: 01/08/1974
• Est. Priority Date: 01/12/1973
• Status: Expired due to Term

• Current Assignee: Glenn C. Waehner
• Original Assignee: Glenn C. Waehner
• Inventors: Waehner, Glenn C.
• Primary Examiner(s): Britton, Howard W.
• Application Number:
  US05/323,155
• Time in Patent Office: 361 Days
• Field of Search: 178/6,6.8,DIG.3 179/15.55R 325/38B
• US Class Current: 375/240.12
• CPC Class Codes: H04N 19/593 involving spatial prediction techniques

Abstract

A digital video data compression system compresses digital words as small as four-bits into two-bit words by means of a combination of coarse data compression and delta modulation data compression. In response to the two most significant bits being the same for five contiguous words, the apparatus switches into delta modulation mode in which the digital word representing the video brightness (sixteen shades of gray in the four-bit embodiment herein) is incremented or decremented by one level or left unchanged. In the encoder section, a delta modulation loop responds to the delta modulation commands to maintain a digital word of the same value which is created by the same command in the decoder section, and that value is compared with incoming words so as to cause the operation to shift into a coarse mode when the delta-modulated word varies from the incoming word by more than three levels, the two-bit compressed word representing, in the coarse mode, the two most significant bits of the video data word. When in the delta modulation mode, one of the four combinations representable by the two bits is a command to shift into the coarse mode; when in the coarse mode, a return to the delta mode is effected by sending the signal for pure black (ZERO, ZERO) followed by a signal for pure white (ONE, ONE), since this is a least-likely signal combination to occur. When this combination naturally occurs, it is automatically changed to a lesser shift by sending ZERO, ZERO followed by ONE, ZERO, in order to avoid ambiguity. Clocking, switching, comparing and other functions are disclosed.

Claims

1. A data compression system alternatively operable in a coarse mode, in which only a high order fraction of a digital data word is transmitted from an encoder section for ultimate decoding in a decoder section, and a delta modulation mode wherein signals indicative of an increase, a decrease or no change are transmitted in lieu of digital data words, comprising:

first means responsive to incoming digital data words to detect strings of data words having a low spatial frequency of change and for establishing operation in the delta modulation mode in response thereto;

a delta modulation loop including an adder, a register means the output of which is connected to one input of said adder, and switching means for alternatively connecting the input of said register means to the output of said adder in response to operation in the delta modulation, or to a source of a base word including at least a high order portion of an input data word in response to operation in the coarse mode;

second means for comparing the output of said adder with an incoming data word and for generating delta modulation control signals indicative of an increase, a decrease or no change required to tend to bring the output of the adder into aggreement with the incoming data words, and applying said delta modulation control signals to said adder, said controls signals comprising fewer digital bits than said incoming digital data words;

third means for comparing the output of said adder with input data words and for shifting the mode of operation from the delta modulation mode into the coarse mode in response to a given disparity therebetween, said third means including means for forcing said second means to establish an output therefrom which generates code signals indicative of transfer from the delta modulation mode into the coarse mode;

encoder section output means responsive to said second means and to at least high order portions of incoming digital data words for transmitting said delta modulation control signals in response to operation in the delta modulation mode, for transmitting said high order fraction of input data words in response to operation in said coarse mode and for transmitting, in response to transfer from said coarse mode into said delta modulation mode, a sequence of data words indicating said transfer; and

a decoder section responsive to signals transmitted by said encoder output means for generating digital data words having a greater number of digital bits than said delta modulation control signals.

2. A data compression system according to claim 1 wherein said high order fraction of said input data words comprises the same number of digital bits as said delta modulation control signals.

3. A data compression system according to claim 1 wherein said second means comprises a comparison circuit for providing a first output signal in response to the value in said register means being equal to or less than the value of said input word, a second output signal in response to the value in said register means being equal to or greater than the value of said input word, and means responsive to said third means for forcing said comparison circuit to provide both of said output signals, said delta modulation control signals comprising said first output and the complement of said second output.

4. A data compression system according to claim 1 wherein said decoder section includes a second delta modulation loop having a second adder, a second register means, the output Of which is connected to one input of said second adder, and switching means for alternatively connecting the input of said second register means to the output of said second adder in response to operation in the delta modulation mode, or to at least said signals transmitted by said encoder output means in response to operation in the coarse mode.

5. A data compression system according to claim 4 wherein said switching means and said second switching means each provide to the input of the respective register, in addition to the high order portion of an input data word and the signals transmitted by said encoder output means, respectively, signals equivalent to a value which is between the maximum and minimum values which can be represented by said high order portion of said transmitted signals, respectively.

6. A data compression system according to claim 1 wherein said encoder section output means includes means for generating a sequence of control signals in response to transfer from said coarse mode into said delta modulation mode, said sequence of control signals advancing from a coded indication of the delta modulation mode, through successive other coded indications, and thence to a coded indication of the coarse mode, and includes switching means controlling the output of said encoder section output means in response to said coded indications.

7. A data compression system according to claim 6 wherein said sequence of control signals comprise a sequence of binary encoded bits and wherein said switching means comprises a multiplexer circuit responsive to said binary encoded bits to connect a pair of signal outputs thereof to a selected one of a plurality of signal input pairs in dependence upon said binary encoded bits applied thereto.