DEVICE FOR THE PROCESSING OF DIGITAL SYMBOL DATA FOR THE PURPOSE OF DISPLAYING TEXT ON A TELEVISION MONITOR

• US 3,787,819 A
• Filed: 07/19/1972
• Issued: 01/22/1974
• Est. Priority Date: 07/23/1971
• Status: Expired due to Term

• Current Assignee: Hendrik Busink
• Original Assignee: Hendrik Busink
• Inventors: Busink, Hendrik
• Primary Examiner(s): Zache, Raulfe B.
• Application Number:
  US05/273,347
• Time in Patent Office: 552 Days
• Field of Search: 340/172.5,324AD 178/15,30
• US Class Current: 348/600
• CPC Class Codes: G09G 1/00 Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of datacathode-ray oscilloscopes G01R13/20; radar display arrangements G01S7/04; display of digital non-picture data in television systems H04N7/0255
• CPC Class Codes: G09G 5/222 Control of the character-code memory

Abstract

A computer terminal for the processing of supplied symbol data for the purpose of displaying lines of text on a television monitor. The buffer memory of the computer terminal comprises an input circuit and a plurality of cyclic submemories, where the input circuit provides for the storage of the data required for displaying one line of text in the respective submemory. The number of times this data is fed from the respective submemory to a symbol generator connected to the buffer memory, corresponds to the number of scan lines required for displaying one line of text, the symbol generator feeding the data of a desired scan line each time to said monitor.

Claims

1. A digital symbol diaplay device for the processing of symbol data presented in digital form for the purpose of displaying text on a television screen comprising a buffer memory, a symbol generator connected to said buffer memory, and a timing unit connected to said buffer memory and said symbol generator, said device, in a first instance, presenting successive lines of text in a read direction to the television screen, and, in a second instance, replacing symbols randomly allocated and already displayed by other symbols, said buffer memory being capable of storing the maximum number of symbols to be displayed on the television screen, said buffer memory being provided with a plurality of cyclic submemories in each of which data required for display and referring to one line of text can be stored in parallel form, while the number of times at which said data is fed to said symbol generator corresponds to the number of scan lines required for the display of one line of text, the data required for display, and pertaining to a desired scan line, each time being fed to said television screen by the symbol generator, the buffer memory being provided with an input circuit with each of said cyclic submemories connected to said input circuit, the information required for displaying one specific line of text being written into a respective cyclic submemory with the aid of the input circuit.

2. A device as claimed in claim 1, wherein the buffer memory comprises a serial-parallel converter, which precedes and is connected to the input circuit and via which the supplied serial information is fed in parallel form to said input circuit, said serial information being divided into symbol-type information, row information and column information whereby the row information indicates the cyclic submemory in which the symbol-type information must be stored, while the column information is for the purpose of determining the time at which the symbol-type information must be stored at a fixed write-in location of said cyclic submemory.

3. A device as claimed in claim 2, wherein the input circuit comprises a symbol register, a row register and a column condition circuit connected to the timing unit, to which, respectively, the symbol-type information, the row information and the column information are fed, and whereby also a submemory selector is present, which submemory selector is connected to the column condition circuit and the row register, and which delivers a control signal at a time to be determined by the column condition circuit, said control signal implementing the writing of said symbol-type information into a respective cyclic submemory

4. A device as claimed in claim 3, wherein the column condition circuit comprises a column register and a symbol counter, to which, respectively, the column information and clock pulses derived from the timing unit are fed, the column condition circuit also containing an equivalence circuit which is connected to said column register and said symbol counter, and which determines the moment at which the submemory selector delivers said control signal.

5. A device as claimed in claim 4, wherein a gate circuit is disposed in a return line of each cyclic submemory, the return line being interrupted when the control signal is applied to said gate circuit, during which the symbol information derived from the input circuit can be written into said memory.

6. A device as claimed in claim 1, wherein the buffer memory is provided with a line selection circuit, via which the information of one specific line of text to be displayed is fed from a respective cyclic submemory to the symbol generator with the aid of the timing unit.

7. A device as claimed in claim 6, wherein the line selection circuit is composed of a counter, to which required count pulses are applied by the timing unit, a decoder connected to said counter, and a number of gate circuits connected to said decoder, each of which is connected to one of the cyclic submemories, whereby a signal corresponding to the decoded counter position opens the gate circuit connected to an associated cyclic submemory, enabling information to be transferred from the associated cyclic submemory to the symbol generator.

8. A device as claimed in claim 1, wherein the information required for displaying a line of text is stored in serial form in the respective cyclic submemory and wherein the buffer memory is provided with a line selection circuit, connected to said submemories whereby the information of the specific line of text to be displayed is fed, with the aid of the timing unit, from the respective cyclic submemory, via said line selection circuit to a serial-parallel converter.

9. A device as claimed in claim 8, wherein, said device contains means for employing the same shift frequency at the cyclic submemories and at the serial-parallel converter and said device being also provided with a switchable memory feeding a recirculating memory for whose functioning two different frequencies are available one frequency for storing the symbol information, which is written in serial form in the cyclic submemory, in the switchable memory capable to receive data in parallel form, and the other frequency for transmitting data from the switchable memory to the recirculating memory, the latter frequency being equal to that of the symbol generator.