INTERLOCKED POWER SUPPLY TRANSFER CIRCUIT TO INHIBIT SECONDARY TRANSFER AFTER A PRIMARY TRANSFER

• US 3,811,050 A
• Filed: 07/13/1973
• Issued: 05/14/1974
• Est. Priority Date: 07/13/1973
• Status: Expired due to Term

• Current Assignee: Edward Jerome Silverman, Robert Wilson Michelet
• Original Assignee: Edward Jerome Silverman, Robert Wilson Michelet
• Inventors: Michelet, Robert Wilson, Silverman, Edward Jerome
• Primary Examiner(s): Schaefer, Robert K.
• Assistant Examiner(s): Ginsburg, M.
• Application Number:
  US05/379,059
• Time in Patent Office: 305 Days
• Field of Search: 307/64,23,82,86,92,43 340/333 317/22 322/45
• US Class Current: 307/64
• CPC Class Codes: H02H 11/00 Emergency protective circuit arrangements for preventing the switching-on in case an undesired electric working condition might result
• CPC Class Codes: H02J 9/061 for DC powered loads

Abstract

A transfer circuit to substitute a spare power supply for a failed one of a plurality of power supplies includes a logic circuit interlock arrangement to inhibit secondary transfers after the switching circuitry of the transfer circuitry has transferred the load from a first failed power supply to a spare power supply. The logic circuit interlock arrangement includes NAND gates and diode gates to complete an energy signal path to activate a transfer relay and apply inhibiting signals to disable subsequent energy signal paths and prevent secondary transfers.

Claims

1. A transfer circuit including first coupling means to accept at least a first and a second power supply, means connected to said first coupling means to sense a failed power supply, second coupling means to accept a spare power supply, switching means connected to said first and second coupling means to substitute a spare power supply for a failed one of said first and second power supplies, and means to inhibit a second substitution subsequent to a first substitution, including gating means associated with each of said first and second power supplies and having a first and second input, said first input responsive to said means to sense, an output of each of said gating means being coupled by individual unidirectional coupling means to said second input of each of the other gating means, and the output of each of the gating means being coupled to operate said switching means, whereby an output signal of one of said gating means activating said switching means additionally controls a signal output of the other of said gating means to inhibit a second substitution by disabling the operation of said switching means.

2. A transfer circuit as defined in claim 1 wherein said switching means includes a relay coil responsive to the signal output of said gating means and switching contacts response to the relay coil to transfer a load from the failed one of said first and second power supplies to the spare power supply.

3. A transfer circuit as defined in claim 1 wherein said gating means each comprises series-connected first and second NAND gates, said first input connected to the first NAND gate, said second input connected to the second NAND gate, the output of each of said second NAND gates being connected to a first terminal of a plurality of diodes each connected to a common junction, the second terminals of each of said diodes being connected to said second input of the second NAND gates associated with other power supplies.

4. A power supply transfer circuit to substitute a spare power supply for an inactive one of a plurality of active power supplies comprising a plurality of input means to accept power supplies, each of said input means including switching means to disconnect therefrom one of said power supplies which becomes inactive and connect in its place the spare power supply, signal sensing means to monitor the output of each of said active power supplies, control circuit means to activate said switching means in response to said signal sensing means, said control circuit means comprising a plurality of sets of NAND gates having input and output terminals, each set of said NAND gates corresponding to each one of said input means, one input terminal of each set of said NAND gates being connected to said signal sensing means, the output terminal of each set of said NAND gates being connected to operate said switching means, and to a diode gate, each diode gate comprising a plurality of diodes interconnecting a second input terminal of each set of said NAND gates to the output terminal of each set of the remaining NAND gates of said plurality of NAND gates, whereby the output of a NAND gate is utilized to switch a spare power supply in place of an inactive power supply and inhibit any subsequent substitution for aNother subsequent inactive power supply.

5. A power supply transfer circuit as defined in claim 4 wherein each diode gate includes a first diode connected to activate an alarm circuit, the alarm circuit comprising a lamp having one terminal connected to said spare power supply and another terminal coupled to said diode.