CAPACITANCE RESPONSIVE DETECTOR SYSTEM

• US 3,811,051 A
• Filed: 11/03/1972
• Issued: 05/14/1974
• Est. Priority Date: 11/03/1972
• Status: Expired due to Term

• Current Assignee: Kenneth C. Merrell
• Original Assignee: Kenneth C. Merrell
• Inventors: Merrell, Kenneth C.
• Primary Examiner(s): Schaefer, Robert K.
• Assistant Examiner(s): Ginsburg, M.
• Application Number:
  US05/303,587
• Time in Patent Office: 557 Days
• Field of Search: 307/116,118,109,125 73/34R,34C 320/1 340/244C,248A 324/61P
• US Class Current: 307/118
• CPC Class Codes: G01F 23/266 measuring circuits therefor
• CPC Class Codes: G01R 27/2605 Measuring capacitance capacitive sensors G01D5/24

Abstract

A capacitance responsive detector system having charging circuits for a variable and standard capacitor and including a differential comparator which is responsive to the difference in the charging rates of the variable and standard capacitors for producing an output signal in accordance therewith. The variable capacitor can be any type of sensor or transducer which senses a property and provides a capacitance output accordingly.

Claims

1. A capacitance responsive detector system comprising:

bias line means adapted to be energized by a source of power;

condition responsive means for exhibiting a capacitance value which varies in accordance with variations of a predetermined condition;

standard capacitance means having a predetermined capacitance value;

charging means connected to said bias line means including a charging resistor in series with said condition responsive means for charging the same at a rate determined by the resistance value of said charging resistor and the capacitance valve of the condition responsive means;

another charging means connected to said bias line means including another charging resistor in series with said standard capacitance meAns for charging the same at a rate determined by the resistance value of said another charging resistor and the predetermined capacitance value of the standard capacitance means; and

differential amplifier comparator means having a pair of inputs, including an inverting input and a non-inverting input, connected to said condition responsive means and to said standard capacitance means, and being responsive to a difference in the respective charging rates for producing an output voltage signal as an indication of such difference.

2. The invention of claim 1 wherein one of the charging means includes another resistor in series with its charging resistor, and a test line extending from the junction point of the resistors.

3. The invention of claim 1 including a discharge means for the condition responsive means and standard capacitance means comprising first, second and third transistors, with the first and second transistors having their emitter-collector circuits connected between the respective inputs of the comparator means and the bias line means through the base-emitter circuit of the third transistor which has its collector joined to the bases of the first and second transistors.

4. The invention of claim 1 wherein the differential amplifier comparator means produces an output voltage signal having a positive or negative polarity in accordance with the relative values of charging rates at its respective intputs, and further including means responsive to the output voltage signal of a given polarity from the differential amplifier comparator means for producing a condition indicating signal.

5. The invention of claim 4 wherein the standard capacitance means is connected to the non-inverting input and the condition responsive means is connected to the inverting input, and wherein the differential amplifier comparator means produces said output voltage signal of a given polarity when the charging rate of the condition responsive means exceeds that of the standard capacitance means.

6. The invention of claim 4 wherein the standard capacitance means is connected to the inverting input and the condition responsive means is connected to the non-inverting input, and wherein the differential amplifier comparator means produces said output voltage signal of a given polarity when the charging rate of the condition responsive means is less than that of the standard capacitance means.

7. The invention of claim 4 wherein said means responsive to the output voltage signal includes a transistor and a collector load therefor, with the emitter-collector circuit of the transistor connected to the bias line means through the collector load.

8. The invention of claim 7 further including a positive feedback network from the collector load to the differential amplifier comparator means.

9. The invention of claim 8 wherein the positive feedback network includes a series resistor and diode.

10. The invention of claim 7 further including a negative feedback network from the collector load to the differential amplifier comparator means.

11. The invention of claim 10 wherein the negative feedback network comprises a resistor connected between the collector load and an input of the differential amplifier comparator means.

12. The invention of claim 1 wherein one of the charging means includes an adjustable resistor in series with the charging resistor.

13. The invention of claim 1 including a relay which is operable in response to a given polarity output voltage signal from the differential amplifier comparator means, and time delay means for delaying the operation of the relay.

14. The invention of claim 13 wherein the time delay means comprises a series resistor and capacitor, and further including another differential amplifier comparator means having a pair of inputs and an output with the voltage across the capacitor of the time delay means applied to one of the inputs and means for applying a predetermined voltage to the other input.

15. THe invention of claim 1 including means for increasing the capacitance seen by one of the charging means.

16. The invention of claim 15 wherein said means for increasing the capacitance comprises a capacitor connected in shunt with said condition responsive means.

17. The invention of claim 1 including voltage regulating means connected to said bias line means.

18. The invention of claim 17 wherein the voltage regulating means comprises a zener diode.

19. The invention of claim 17 wherein the voltage regulating means comprises a transistor having its emitter collector circuit connected in series in the bias line means and a zener diode connecting the base of the transistor to the bias line means.

20. The invention of claim 1 wherein said condition responsive means is connected to the input of the differential amplifier comparator means by a conductor having an outer coaxial shield insulated therefrom.

21. The invention of claim 20 further including an inner coaxial shield disposed between and insulated from said conductor and said outer coaxial shield and means for driving the inner shield in phase with the signal applied to the input of the differential amplifier comparator means connected to the condition responsive means.

22. The invention of claim 21 wherein the means for driving the inner shield comprises a unity gain amplifier having an input connected to the input of the differential amplifier means connected to the condition responsive means and an output connected to the inner shield.

23. The invention of claim 21 including a discharge circuit for the condition responsive means and the standard capacitance means, and means responsive to discharge through said discharge circuit for discharging the potential on the inner shield.

24. The invention of claim 1 including a third charging means including a third charging resistor, a second standard capacitance means in series with said third charging resistor, and a second differential amplifier comparator means having a pair of inputs connected to the condition responsive means and the second standard capacitance means for producing a second output voltage signal in accordance therewith.

25. The invention of claim 24 including first and second relays operable in response to output voltage signals from the first and second differential amplifier comparator means, respectively.

26. The invention of claim 1 wherein the condition responsive means is a capacitor probe.