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CHARACTER DISPLAY SYSTEM

  • US 3,818,482 A
  • Filed: 07/24/1972
  • Issued: 06/18/1974
  • Est. Priority Date: 07/27/1971
  • Status: Expired due to Term
First Claim
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1. In a character display system having a scanning cathode ray tube display for displaying M X N characters and a plurality of storage units coupled with said cathode ray tube display for storing characters to be displayed, the improvement including an editing apparatus for inserting and removing characters to and from said storage units, comprising:

  • first memory means for storing (M -

         1) X N bits of information;

    second memory means for storing N bits of information;

    a first data transfer path coupling said first and second memory means together;

    third memory means for storing a single bit of information;

    first switching means for switching said third memory means into and out of said first data transfer path in a predetermined manner;

    fourth memory means for storing N bits of information;

    second switching means for switching said fourth memory means into and out of said first data transfer path in a prdetermined manner;

    a second, recirculation, data transfer path for transferring data from the output of said first memory means to the input of said first memory means;

    third switching means for switching the output of said first memory means between said first and second data transfer paths in a predetermined manner;

    means generating an external clock signal having a predetermined timing relationship with a scan control signal Of said scanning cathode ray tube display;

    means coupling said clock signal generating means to said first, second and third switching means, respectively, to control the circulation of information stored in said memories in synchronization with said external clock signal;

    an address counter coupled to said external clock signal generating means during a normal chracter display for monitoring the address of M X N bits of information;

    means for detecting the first and last information bits in a given data display row and the first and last information bits in a given data display page in accordance with the content of said address counter, the output of said detecting means being coupled to at least one of said switching means to switch at least one of said memory means between said first and second data transfer paths;

    a curser counter having the same capacity as said address counter and including means coupled to said address counter to arbitrarily set the contents of said address counter by an external control signal; and

    control means applying an additional clock signal to at least a portion of said memories to control insertion and deletion of information stored in said memories.

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