ASYMMETRICAL WAVE DIGITAL PHASE MEASURING SYSTEM

• US 3,820,022 A
• Filed: 09/28/1972
• Issued: 06/25/1974
• Est. Priority Date: 09/28/1972
• Status: Expired due to Term

• Current Assignee: Richard E. Watt
• Original Assignee: Richard E. Watt
• Inventors: Watt, Richard E.
• Primary Examiner(s): Smith, Alfred E.
• Application Number:
  US05/293,108
• Time in Patent Office: 635 Days
• Field of Search: 324/83A,83R,83D 328/133,62
• US Class Current: 324/76.82
• CPC Class Codes: G01R 25/00 Arrangements for measuring phase angle between a voltage and a current or between voltages or currents

Abstract

The phase difference between two CW signals having the same frequency is distorted when the '"'"''"'"''"'"''"'"'zero'"'"''"'"''"'"''"'"' value of either or both of the signals shifts either in the relatively positive or negative direction, causing an asymmetrical wave. A system of dual clocks in which a first clock measures the phase between positive transitions of the data and reference signals and a second clock measures the phase between negative transitions of the data and reference signals is incorporated. Both measurements occur singularly and/or simultaneously and are averaged to produce an output representative of the phase difference between the reference and the data signal.

Claims

1. A system for measuring the phase between a pair of signals having the same frequency comprising:

a first pulse generator selectively connected to a counter through a first AND gate, first Flip-flop means for alternatively enabling and disabling said first AND gate by the positive transitions of the pair of signals respectively, to thereby accumulate a first plurality of pulses, a second pulse generator selectively connected to said counter through a second AND gate, second flip-flop means for alternatively enabling and disabling said second AND gate by the negative transitions of the pair of signals respectively, to thereby accumulate a second plurality of pulses, accumulator means for totaling the accumulated first plurality of pulses, and means for determining the phase difference between the pair of signals as a function of said pluralities of pulses.

2. A system according to claim 1 in which said first pulse generator and said second pulse generator generate out of phase pulses at the same frequency.

3. A system according to claim 2 in which the pulse generated by said first generator is 180* out of phase with the pulses generated by said second generator.

4. A system according to claim 1 which includes a single clock generator feeding said first pulse generator for generating positive pulses on positive transitions of the clock generator, an inverter connected to said clock generator to generate pulses of the opposite polarity, and said second pulse generator fed by said inverter for generating positive pulses on positive transitions of the inverted clock pulses whereby said first and second pulse generators generate pulses 180* out of phase with respect to each other and at the same frequency as said clock generator.

5. A system according to claim 1 in which said first and second pulse generators feed pulses simultaneously to said counter, through said enabled first and second AND gates.

6. A system according to claim 1 further including control means coupled to one of said flip-flop means and operable in response to the successive enablings of said flip-flop means for disabling the system after a predetermined number of enablings, and wherein said means for determining phase difference include an overflow counter coupled to said accumulator means for storing a count representative of the total accumulated pulses.