AUTOMATIC SECTOR INDICATING DIRECTION FINDER SYSTEM
First Claim
1. An apparatus for determining the sector location of a target comprising:
- antenna means for providing quadrupole and dipole mode field patterns for determining the azimuth of a target where the patterns are a function of sin 2 phi , cos 2 phi , sin phi , and cos phi , and phi is the azimuth angle;
receiver means connected to said antenna means for forming output signals from emissions independent of frequency in a specified range received from such a target, said output signals including received signal magnitude and phase information;
digital comparator means connected to said receiver means for determining relative comparisons of selected magnitude and phase information of signals therefrom and forming digitally encoded representations thereof; and
, means connected to said digital comparator means and provided with the output representations thereof for determining from the digitally encoded representations a sector location of the target in azimuth where the sector is of predetermined angular width.
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Abstract
An automatic sector indicating direction finder system which incorporates a receiving antenna arrangement incorporating four separate antenna patterns, each having a field pattern which is a function of the azimuth angle, the apparatus forming antenna signals which are then transferred through a plurality of antenna sequencing relays to a dual channel receiver. The dual channel receiver is connected to the four antennae in a timed sequence. The two outputs of the dual channel receiver are applied to phase detectors and amplitude detectors which determine the relative amplitude ratios. These ratios and the phase measurements are stored in memory momentarily and are then strobed from memory through a hard wired decoding logic circuit to an external display. The display breaks the 360* of azimuth into sixteen sectors, all equal in size, and indicates the sector location of a target.
54 Citations
20 Claims
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1. An apparatus for determining the sector location of a target comprising:
- antenna means for providing quadrupole and dipole mode field patterns for determining the azimuth of a target where the patterns are a function of sin 2 phi , cos 2 phi , sin phi , and cos phi , and phi is the azimuth angle;
receiver means connected to said antenna means for forming output signals from emissions independent of frequency in a specified range received from such a target, said output signals including received signal magnitude and phase information;
digital comparator means connected to said receiver means for determining relative comparisons of selected magnitude and phase information of signals therefrom and forming digitally encoded representations thereof; and
, means connected to said digital comparator means and provided with the output representations thereof for determining from the digitally encoded representations a sector location of the target in azimuth where the sector is of predetermined angular width.
- antenna means for providing quadrupole and dipole mode field patterns for determining the azimuth of a target where the patterns are a function of sin 2 phi , cos 2 phi , sin phi , and cos phi , and phi is the azimuth angle;
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2. The apparatus of claim 1 including in said antenna means a. a first quadrupole mode antenna;
- b. a second quadrupole mode antenna oriented 45* in azimuth from said first antenna;
c. a first dipole mode antenna oriented 0* in azimuth from said first quadrapole mode antenna; and
, d. a second dipole mode antenna oriented 90* in azimuth from said first dipole mode antenna.
- b. a second quadrupole mode antenna oriented 45* in azimuth from said first antenna;
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3. The apparatus of claim 2 including means for sequentially operating said antennas to provide signals to said receiver means in a sequenced pattern.
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4. The apparatus of claim 3 wherein the operating means includes first and second similar means for sequentially enabling said antennas in the following pattern:
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5. The circuit of claim 2 wherein said antenna means forms two signals E1 and E2 processed through said receiver means having relative amplitudes and said digital comparator means Forms a binary output given by 1 if E2 <
- or = X E1 and 0 if E2 >
X E1 where E1 first antenna signal;
E2 second antenna signal;
X scale factor
- or = X E1 and 0 if E2 >
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6. The circuit of claim 2 wherein said antenna means forms two signals E1 and E2 processed through said receiver means having relative phases and said digital comparator means forms a binary output given by 1 if E1 and E2 are in phase 0 if E1 and E2 are not in phase where in phase is within + or - 89*.
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7. The circuit of claim 6 wherein said antenna means forms signals processed through said receiver means having relative amplitudes and said digital comparator means forms a binary output given by 1 if E2 <
- or = X E1 and 0 if E2 >
X E1 where E1 first antenna signal;
E2 second antenna signal;
X scale factor.
- or = X E1 and 0 if E2 >
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8. The apparatus of claim 1 wherein said receiver means includes at least two simultaneously operative channels which are matched in gain and phase shift to a specified level.
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9. The apparatus of claim 8 wherein a 90* phase shifter means is incorporated in one of the two channels.
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10. The apparatus of claim 9 including means for controlling operation of said phase shifter means to times when said two channels receive signals from said antenna means which are a function of phi and 2 phi .
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11. The apparatus of claim 1 wherein said comparator means includes a binary phase detector.
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12. The apparatus of claim 1 wherein said comparator means includes a pair of envelope detector means which are connected to at least one ratio detector means.
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13. The apparatus of claim 12 wherein said ratio means are connected to a memory means for temporary storage prior to being supplied to the last named means of claim 1.
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14. The apparatus of claim 13 wherein the last named means of claim 1 includes a decoding logic network which indicates sector location where each sector is represented by unique Boolean algebraic expressions.
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15. The invention of claim 1 wherein said last named means includes a decoding logic network which responds to binary input signals.
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16. The apparatus of claim 15 wherein said logic network implements a unique Boolean algebraic expression for each sector.
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17. The apparatus of claim 16 wherein at least two sectors are represented by alternative Boolean algebraic expressions, at least one of which is operative when the antenna pattern of said antenna means is distorted from the ideal such that nulls of the patterns are mislocated at least to an adjacent sector.
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18. The apparatus of claim 17 wherein said logic network implements two expressions which are or-ed.
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19. The apparatus of claim 17 wherein said sectors represented by alternative expressions are alternately arranged in a circle about said antenna means.
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20. The apparatus of claim 13 wherein said memory means is strobed periodically to deliver stored data indicative of comparisons to the last named means of claim 1.
Specification