ELECTRONIC PUSH BUTTON COMBINATION LOCK

• US 3,831,065 A
• Filed: 04/06/1973
• Issued: 08/20/1974
• Est. Priority Date: 04/06/1973
• Status: Expired due to Term

• Current Assignee: Weslock Corporation
• Original Assignee: Paul Quinn, Ricky Martin
• Inventors: Martin, Ricky, Quinn, Paul
• Primary Examiner(s): Miller, J. D.
• Assistant Examiner(s): Moose, Jr., Harry E.
• Application Number:
  US05/348,753
• Time in Patent Office: 501 Days
• Field of Search: 317/134 307/1AT 70/278 340/147B,147MD,149A,149R,164R,146.2
• US Class Current: 340/5.54
• CPC Class Codes: G07C 9/0069 actuated in a predetermined sequence

Abstract

The electronic lock includes a plurality of push buttons which are sequentially actuated to provide a series of output binary signals. These signals are successively compared with a series of stored coded signals in a plurality of circuits which are caused to be successively actuated by a ring counter, a correct comparison providing an advance signal for the ring counter so that the next stored coded binary signal can be compared with the next applied output binary signal from the push button console. If the input code corresponds correctly with the codes in the coded circuits, the ring counter will complete its complete count, the last stage of the counter providing an unlocking signal to open the lock.

Claims

1. An electronic push button combination lock comprising, in combination:

a. a plurality of push buttons corresponding to a plurality of different numbers respectively;

b. a decimal to binary converter circuit connected to said push buttons for providing an output binary signal in response to depression of a selected button equivalent to the number associated with the selected button;

c. a comparator circuit having a first input receiving said output binary signal and a second input receiving a coded binary signal;

d. a given number of coded circuits each providing a coded binary signal upon actuation for reception in the second input of said comparator circuit;

e. a ring counter having a number of stages one greater than said given number of coded circuits, the first and subsequent stages being connected to said coded circuits respectively to successively actuate the same when the connected stage is energized and the last stage providing an unlocking signal; and

, f. a lock responsive to said unlocking signal to open, said comparator generating an advance signal to the counter to advance it to the next successive stage whenever said output binary signal corresponds to said coded binary signal, and generating a reset signal to reset said ring counter whenever said output binary signal does not correspond to said coded binary signal whereby said lock will not open unless a sequence of push buttons are depressed to provide successive output binary signals which equal the successive coded binary signals supplied by the coded circuits in response to the successive actuation of the stages of the ring counter.

2. An electronic lock according to claim 1, including a timer connected to said ring counter and responsive to generation of said unlocking signal to reset said counter to its first stage after a given period of time.

3. An electronic lock according To claim 1, including a code insert system to enable the successive code binary signals in said given number of coded circuits to be changed to new codes from a remote location, said code insert system including:

a code insert multiple bit shift register for effecting a serial to parallel conversion of successive bits of code information, said given number of coded circuits being connected to the parallel conversion output of said code insert multiple bit shift register; and

a data signal line means providing a series of code pulses representing the new codes connected to the serial input of said code insert multiple bit shift register to provide said successive bits of code information from a remote location.

4. An electronic lock according to claim 3, in which said data signal line means providing said series of code pulses includes a first line carrying a series of uniformly spaced clock pulses and a second line carrying a control data wave from defining the new codes for gating certain ones of the clock pulses to form said successive bits of code information in accordance with the new codes.

5. The subject matter of claim 3, wherein there are provided a plurality of additional electronic locks at different stations all identical to said electronic lock, said electronic lock and additional electronic locks each including individual address responsive means comprising:

an address multiple bit shift register for effecting a serial to parallel conversion of successive bits of address information;

an address comparator having a first input connected to the parallel conversion output of said address multiple bit shift register;

an address code identifying the particular electronic lock connected to a second input of said address comparator;

an address signal line means providing a series of address pulses representing the address code connected to the serial input of said address multiple bit shift register to provide said successive bits of address information; and

a gate connected between said data signal line means and said code insert multiple bit shift register and controlled by an open gate signal from said address comparator to open and permit a new code to be inserted, said open gate signal from said address comparator only being generated when the address code supplied by said address signal line means corresponds with the address code identifying the particular electronic lock.

6. The subject matter of claim 5, in which said address signal line means providing said series of address pulses includes a first line carrying a series of uniformly spaced clock pulses and a second line carrying a control data wave form defining the address for gating certain ones of the clock pulses to form said successive bits of address information in accordance with the address code identifying the particular electronic lock.

7. An electronic push button combination lock including in combination:

a. a plurality of push buttons corresponding to a plurality of different numbers respectively;

b. a decimal to binary converter circuit connected to said push buttons for providing an output binary signal in response to depression of a selected button equivalent to the number associated with the selected button;

c. a comparator circuit having a first input receiving said output binary signal and a second input receiving a coded binary signal;

d. a given number of coded circuits each providing a coded binary signal upon actuation for reception in the second input of said comparator circuit; and

e. a ring counter having a number of stages one greater than said given number of coded circuits, the first and subsequent stages being connected to said coded circuits respectively to successively actuate the same when the connected stage is energized and the last stage providing an unlocking signal, said comparator generating an advance signal to the counter to advance it to a next successive stage whenever said output binary signal corresponds to said coded biNary signal, and generating a reset signal to reset said reing counter whenever said output binary signal does not correspond to said coded binary signal whereby said unlocking signal will only be provided if push buttons are depressed in a sequence to provide successive output binary signals which equal the successive coded binary signals supplied by the coded circuits in response to the successive actuation of the stages of the ring counter.