VARIABLE MESSAGE LENGTH DATA ACQUISITION AND RETRIEVAL SYSTEM AND METHOD USING TWO-WAY COAXIAL CABLE

• US 3,836,888 A
• Filed: 05/22/1972
• Issued: 09/17/1974
• Est. Priority Date: 05/22/1972
• Status: Expired due to Term

• Current Assignee: Clyde O. Boenke, Michael R. Levine, Murray H. Miller, Victor H. Rigotte, Weston E. Vivian, William C. Hall
• Original Assignee: Clyde O. Boenke, Michael R. Levine, Murray H. Miller, Victor H. Rigotte, Weston E. Vivian, William C. Hall
• Inventors: Boenke, Clyde O., Miller, Murray H., Levine, Michael R., Rigotte, Victor H., Vivian, Weston E., Hall, William C.
• Primary Examiner(s): Henon, Paul J.
• Assistant Examiner(s): Thomas, James D.
• Application Number:
  US05/255,477
• Time in Patent Office: 848 Days
• Field of Search: 178/66R,58,5.6,79,113,17 179/15BA,15BV,15FD,2DP,84VF 343/175 340/176,172.5,166R,173SP,174SP,172S,36SR
• US Class Current: 713/600
• CPC Class Codes: G06F 13/38 Information transfer, e.g. on bus G06F13/14 takes precedence
• CPC Class Codes: H04L 27/12 Modulator circuits; Transmitter circuits
• CPC Class Codes: H04L 27/2057 with a separate carrier for each phase state
• CPC Class Codes: H04L 5/00 Arrangements affording multiple use of the transmission path
• CPC Class Codes: H04N 2007/17372 the upstream transmission being initiated or timed by a signal from upstream of the user terminal
• CPC Class Codes: H04N 7/17309 Transmission or handling of upstream communications

Abstract

A control computer is connected via a coaxial cable to a plurality of remote terminals. Data and command signals are transmitted in the forward direction from the computer to the terminals by time-multiplexing the signals on one channel of the cable and data and request signals are transmitted in the return direction from the terminal to the computer by time-multiplexing these signals on a different channel of the cable. Each terminal is equipped with several input-output devices which operate at different speeds. The computer operates at high speed to fill its main memory with commands. An interface is connected between the computer and the cable and is capable of operating at different speeds, i.e., at different time intervals between transmissions of digital words to different terminals or between repeated transmissions to the same terminal. It normally operates at a speed lower than the speed of the computer to service the low speed terminal devices. However, when a command for a high speed operation at a terminal is recognized, the interface enters a burst mode which supplies commands to the terminal at the high speed of the computer. Transmission in the forward direction is accomplished by frequency shift keying, and in the return direction by phase shift modulation. Words are transmitted serial-by-bit. Each terminal has a unique means for storing its permanent terminal address parallel-by-bit for comparison with serial address bits transmitted by the computer. The terminals are divided into several different major groups. The computer addresses the terminals by first transmitting a major address to select the proper group, and then sends a minor address to select the terminal within the major group. Each terminal is provided with a local storage and a novel keyboard for entering request codes into the storage. Each terminal is also provided with a visual display means for displaying data transmitted from the computer. A novel one-line display also provides the terminal with a visual display of the information entered on the keyboard or a message sent to the terminal.

Claims

1. A variable message length data acquisition and retrieval system for the communication of data between a control computer and a plurality of remote data terminals comprising:

a. a two-way carrier modulated transmission line coupled between the computer and said terminals, b. an interface connected between the computer and said transmission line, said interface comprising;

1. a transmitter for transmitting contiquous data words in a time-multiplexed mode to selected terminals via a forward channel of said transmission line,

2. A system as defined in claim 1 wherein said data words are alphanumeric characters and said terminal comprises data storage means and data display means, said clock pulse generating means being operative to transmit a burst of characters via said forward channel to said storage means, and means coupling said storage means to said display means.

3. A system as defined in claim 1 wherein the data words transmitted by said computer are alphanumeric characters in serial bit form, said interface further comprising means for forming from the serial character bits television line bit patterns representing said characters, and television means at said terminal for displaying one line of characters, said clock pulse generating means being operative to transmit serial-by-bit the bit patterns for one line of characters via said forward channel in a burst mode to said television means.

4. A system as defind in claim 1 wherein the data words transmitted by the computer include a major address and a minor address, address storage means at each terminal for storing the major address and the minor address of that terminal, address comparison means at each terminal for comparing the stored major address with the transmitted major address, means responsive to a match of the stored and transmitted major addresses to condition the comparison means for a subsequent comparison of a transmitted minor address and a stored minor address, and means responsive to a mismatch of the stored and transmitted major addresses for inhibiting the subsequent comparison of the stored minor address and a transmitted minor address.

5. A system as defined in claim 4 wherein said address storage means comprises an address matrix for storing in parallel bit form both the major and minor addresses of the terminal, multiplexing means for converting the stored parallel address into serial bit for comparison in said comparison means on a bit-by-bit basis with the bits of the addresses transmitted by the computer.

6. A system as defined in claim 5 wherein said address matrix comprises a circuit board, a plurality of spaced parallel bit conductors on one surface of the board and being equal in number to the number of bits in each of said major and minor addresses, a plurality of control conductors on the opposite surface of said board and extending at right angles to said bit conductors, a through-hole extending through the board at the overlapping points of each pair of bit and control conductors, means connecting the bit conductors to said multiplexing means, means fixing one pair of said control conductors at two different voltage polarities, switch means for selectively applying a different one of said two polarities to each of another pair of two control conductors, said switch means being responsive to a major address to apply one combination of said two polarities to said other pair of control conductors and responsive to a minor address to apply the opposite combination of said two polarities to said other pair of control conductors, and means for electrically interconnecting said bit conductors and said control conductors through said through-holes in a combinatorial pattern corresponding to the major and minor addresses of the terminal, whereby the voltage polarities appearing on the said bit conductors represent the major and minor addresses of the terminal.

7. A system as defined in claim 1 wherein said transmission line is a multiple channel CATV coaxial cable.

8. A system as defined in claim 1 wherein said transmitter is a frequency shift keyed modulated transmitter and said receiver is a phase shift keyed receiver.