ELECTRONICALLY PROGRAMABLE SWITCHING SYSTEM

• US 3,840,752 A
• Filed: 05/16/1973
• Issued: 10/08/1974
• Est. Priority Date: 01/23/1973
• Status: Expired due to Term

• Current Assignee: Kamran Eshraghian
• Original Assignee: Kamran Eshraghian
• Inventors: Eshraghian, Kamran
• Primary Examiner(s): Schaefer, Robert K.
• Assistant Examiner(s): Smith, William J.
• Application Number:
  US05/360,834
• Time in Patent Office: 510 Days
• Field of Search: 307/141,115 340/147P 134/57R,57D,58R,58D 317/137,140
• US Class Current: 307/141
• CPC Class Codes: D06F 34/06 Timing arrangements
• CPC Class Codes: D06F 34/08 Control circuits or arrangements thereof
• CPC Class Codes: G05B 19/07 where the programme is defined in the fixed connection of electrical elements, e.g. potentiometers, counters, transistors
• CPC Class Codes: G05B 2219/25267 Shift register

Abstract

A switching device comprises a plurality of control points and a plurality of switching elements, and each control point is associated with one or more switching elements. The switching elements are actuated by the presence of actuation information at the associated control point. A shift register having states related to the control points supplies actuation information to the control points in a predetermined sequence under the control of timing pulses which advance the states of the register whereby a series of combination of switching functions may be performed.

Claims

1. A switching device comprising:

a plurality of control points and a plurality of switching elements, each said control point being associated with one or more of said switching elements, said switching elements being actuated by the presence of actuation information at said associated control point, a shift register having states related to said control points for supplying actuation information to said plurality of control points in a predetermined sequence under the control of timing pulses which advance the states of the register whereby a series of combinations of switching functions may be performed, the intervals between occurrence of consecutive timing pulses determining the period of time for which actuation information is present at the respective control points, a pulse supply means capable of supplying to the shift register timing pulses either recurring at relatively long intervals or recurring at relatively short intervals, means for deriving programme information from the actuation information present at said control points, the derived programme information being applied to said pulse supply means for determining, in accordance with a programme, whether the timing pulses supplied to said shift register recur at relatively long intervals or recur at relatively short intervals, a multistable programme override circuit having two stable output states, one output state providing for continuous supply to the shift register of timing pulses recurring at relatively short intervals, the other output state providing for supply to the shift register of timing pulses recurring at either relatively long intervals or at relatively short intervals in accordance with the programme, transition of the output state of the override circuit being controlled by information derived from one or more control points.

2. A switching device as claimed in claim 1, wherein said pulse supply means includes a discrete first pulse source for producing pulses recurring at relatively long intervals, a discrete second pulse source for producing pulses recurring at relatively short intervals and further including a selection circuit selectively making said shift register responsive either to said first pulse source or said second pulse source, said selection circuit being responsive to said override circuit output informatioN and when the output of said override circuit is in said one output state said selection circuit permits timing pulses to be derived only from the said second pulse source and when the output of said override circuit is in the said other state, said selection circuit permits timing pulses to be derived from either the first or second pulse source in accordance with said programme information.

3. A switching device as claimed in claim 1, wherein said pulse supply means includes a pulse source from whence timing pulses may be derived for supply to the shift register, the pulse source being adapted to operate in either a first mode of operation or a second mode of operation, the pulse source producing pulses recurring at relatively long intervals when operating in the first mode and producing pulses recurring at relatively short intervals when operating in the second mode, said override circuit output information being so applied to control the pulse source that when the output of said override circuit is in said one output state said pulse source operates only in the second mode, whereas when the output of the said override circuit is in the said other state, the pulse source operates in either the first or second mode in accordance with the said programme information.

4. A switching device as claimed in claim 3, wherein in that the said pulse source is in the form of a relaxation oscillator, the repetition frequency of which is determined by the series combination of two capacitors one of which is shunted by the collector-emitter path of a transistor adapted to be rendered either conductive so that the pulse source operates in the said first mode or non-conductive so that the pulse source operates in the said second mode, and further includes pulse source control means for rendering the transistor conductive when the output of said override circuit is in said one output state or conductive in response to the said programme information when the output of said override circuit is in the said other output state.

5. A switching device as claimed in claim 4 further including switching means for switching said override circuit into or out of a non-override condition in which the output of the override circuit is in the said other output state and transition of the output state is inhibited.

6. A switching device as claimed in claim 5 wherein a programme selection means for providing selection information and comparison means for comparing selection information thus provided with actuation information present at the said respective control points of the plurality produces said programme information.

7. A switching device as claimed in claim 6 wherein said programme override circuit is a triggerable bistable device to which the said actuation information produced at said predetermined control points is supplied to trigger the bistable device into an opposite state and thereby change the output state of the bistable device.

8. A switching device as claimed in claim 6 having said shift register arranged to be arrested at the completion of a cycle of the register states and in which the said programme override circuit is a triggerable multistable device having more than two stable states, one stable state producing information at an auxiliary output of the multistable device which prevents the said shift register from being arrested at the completion of a cycle of the register states, the said actuation information produced at the said predetermined control points being supplied to trigger the multistable device.

9. An electronically programable switching system comprising:

a plurality of control points;

a plurality of switching elements, each said switching element being operatively responsive to actuation information on at least one predetermined control point;

A shift register supplying actuation information to said plurality of control points in a predetermined sequence in response to timing pulses which advance the states Of said register, said shift register being responsive to the intervals between the occurrence of consecutive timing pulses to vary the period of time for which actuation information is present at said plurality of control points;

pulse supply means for supplying to the shift register timing pulses at relatively short intervals and also at relatively long intervals;

means for varying the interval between occurrence of consecutive timing pulses responsive to the state of said control points.