OPTICAL SOLID STATE SWITCHES

• US 3,851,328 A
• Filed: 01/17/1973
• Issued: 11/26/1974
• Est. Priority Date: 01/17/1973
• Status: Expired due to Term

• Current Assignee: Anthony F. Sanducci, Michael R. Sottile
• Original Assignee: Anthony F. Sanducci, Michael R. Sottile
• Inventors: Sottile, Michael R., Sanducci, Anthony F.
• Primary Examiner(s): Trafton, David L.
• Application Number:
  US05/324,366
• Time in Patent Office: 678 Days
• Field of Search: 340/325,336,337,365P 178/17D 307/311 250/221,222R,237R
• US Class Current: 345/156
• CPC Class Codes: G01R 15/002 Switches for altering the measuring range or for multitesters
• CPC Class Codes: H03K 17/945 Proximity switches H03K17/96 takes precedence
• CPC Class Codes: H03K 17/965 Switches controlled by moving an element forming part of the switch
• CPC Class Codes: H03K 17/969 having a plurality of control members, e.g. keyboard

Abstract

A basic switching apparatus for use in a control panel comprising an opening in the panel with a light emitting diode embedded in one side and a photodetector in the other side so that an operator may place his finger in the opening to obtain a switching action is shown. Also shown are logic circuits and display devices which may be added to the switch to permit using it as an alternate action switch, potentiometer, rotary switch and thumbwheel switch along with multiplexing apparatus useful where a large number of these devices are installed on a control panel.

Claims

1. Control panel switching apparatus comprising:

a. a control panel base constructed of a thin sheet of rigid material having at least one hole therein of a size large enough to insert a human finger therethrough;

b. a light source at an edge of said hole and aimed to project across said hole;

c. light detecting means across from said light source and positioned to intersect the light therefrom, said detecting means providing an output at a first level when light is imaged thereon and at a second level when no light is imaged thereon;

d. a transistor switch obtaining its input from the output of said detecting means and providing its output as the output of the switching apparatus said transistor adapted to provide a ground output in response to said first level and a high output in response to said second level whereby inserting a finger in said hole momentary switching action may be obtained;

e. a plurality of n indicators mounted in said panel adjacent said hole and arranged in contiguous relationship;

f. an n bit shift register having its n outputs coupled to said n indicators;

g. means to load and shift, at a slow rate, a plurality of ones into said shift register in response to a high output from said transistor; and

h. means to reset said shift register upon all bits in said register becoming ones whereby action equivalent to that of a potentiometer may be obtained by inserting a finger in said hole until the desired percentage of indicators are lighted.

2. The invention according to claim 1 and further including a digital to analog converter coupled to the n outputs of said shift register providing an analog output corresponding to a conventional potentiometer output.

3. The invention according to claim 1 wherein the data input of said shift register is coupled to a voltage source and said means to load and shift comprise:

a. a slow clock; and

b. a first AND gate having as inputs the output of said slow clock and the output of said transistor and providing its output as a shift input to said shift register.

4. The invention according to claim 3 wherein said means to reset comprise:

a. a second AND gate having as inputs the n output of said register and providing an output when all inputs are present;

b. a flip-flop obtaining its data input from said second AND gate;

c. an inverter having said slow clock output as an input and providing its output as a clock input to said flip-flop; and

d. a third AND gate having as inputs the output of said flip-flop and of said first gate and providing its output to reset said shift register.

5. The invention according to claim 4 wherein said n outputs are coupled to said n indicators through n lamp drivers and further including:

a. n AND gates each having as one input an output from said shift register and providing its output to one of said n drivers; and

b. means to sequentially enable, at a rate faster than the response of the eye, each of said n gates.

6. The invention according to claim 5 wherein said mean to enable comprise:

a. a fast clock;

b. a second n bit shift register obtaining its shift input from said fast clock and providing its n outputs as enabling inputs to said n gates;

c. a fourth AND gate having as inputs the n inverted outputs of said second shift register;

d. a second inverter obtaining its input from said fast clock; and

e. a fifth AND gate having as inputs the output of said fourth AND gate and of said inverter and providing its output as a data input to said second shift register.

7. An n position rotary switch comprising:

a. a control panel base constructed of a thin sheet of rigid material having at least one hole therein of a size large enough to insert a human finger therethrough;

b. a light source at an edge of said hole and aimed to project across said hole;

c. light detecting means across from said light source and positioned to intersect the light therefrom, said detecting means providing an output at a first level when light is imaged thereon and at a second level when no light is imaged thereon;

d. a transistor switch obtaining its input from the output of said detecting means and providing its output as the output of the switching apparatus said transistor adapted to provide a ground output in response to said first level and a high output in response to said second level whereby inserting e. a plurality of n indicators mounted in said panel adjacent said hole and arranged in contiguous relationship;

f. an n bit shift register having its n outputs coupled to said n indicators; and

g. means responsive to the high output of said transistor to sequentially shift a single bit through said shift register for as long as said output is present.

8. The invention according to claim 7 wherein said indicators are coupled through lamp drivers.

9. The invention according to claim 7 wherein said responsive means comprise:

a. a first AND gate having its inputs connected to the n outputs of said shift register and responsive to said inputs to provide a high output when all inputs are zero;

b. a flip-flop obtaining its data input from said first AND gate and providing its output as a data input to said shift register;

c. a slow clock;

d. an inverter having the output of said slow clock as an input and providing its output as a clock input to said flip-flop; and

e. a second AND gate having as inputs said slow clock and the output of said transistor and providing its output as a shift input to said shift register.

10. Switching apparatus duplicating the action of a thumbwheel switch comprising:

a. a control panel base constructed of a thin sheet of rigid material having at least one hole therein of a size large enough to insert a human finger therethrough;

b. a light source at an edge of said hole and aimed to project across said hole;

c. light detecting means across from said light source and positioned to intersect the light therefrom, said detecting means providing an output at a first level when light is imaged thereon and at a second level when no light is imaged therEon;

d. a transistor switch obtaining its input from the output of said detecting means and providing its output as the output of the switching apparatus said transistor adapted to provide a ground output in response to said first level and a high output in response to said second level whereby inserting a finger in said hole momentary switching action may be obtained;

e. a segmented numeric display mounted in said panel adjacent said hole; and

f. means responsive to the output of said transistor to sequence the number displayed on said display from zero through nine for as long as said output is high.

11. The invention according to claim 10 wherein said means to sequence comprise:

a. a ten bit shift register;

b. a digit encoder and driver having the ten outputs of said shift register as inputs and providing its outputs to drive said numeric display;

c. a first AND gate having its inputs connected to the n outputs of said shift register and responsive to said inputs to provide a high output when all inputs are zero;

d. a flip-flop obtaining its data input from said first AND gate and providing its output as a data input to said shift register;

e. a slow clock;

f. an inverter having the output of said slow clock as an input and providing its output as a clock input to said flip-flop; and

g. a second AND gate having as inputs said slow clock and the output of said transistor and providing its output as a shift input to said shift register.

12. The invention according to claim 10 wherein a plurality of holes each having associated light sources, detecting means, transistors and numeric displays are provided and said responsive means comprises:

a. a memory to store the current number to be displayed on each of said displays;

b. means to sequentially read said numbers in said memory and to provide said numbers to activate the respective ones of said displays;

c. means responsive to a high output from any transistor to disable said means to read and to address the memory to the display associated with the transistor having a high output and to enable writing in that memory location; and

d. means responsive to said high output to cause the number sequencing from zero to nine to be written into said memory location.

13. The invention according to claim 12 wherein said means to sequence, means to disable and means to write comprise:

a. encoder logic having as inputs the outputs of the plurality of transistors and providing in response to one of said inputs a first output identifying the input line, a second output providing a write enable to said memory, a third read disable output and a fourth inhibit output;

b. a fast clock;

c. a first AND gate having the output of said fast clock and said fourth inhibit output as inputs and adapted to pass pulses from said clock in the absence of said inhibit input;

d. an address counter obtaining its clock input from said first gate;

having said first output as a preset input, and said fourth output as a preset enable input and providing its output to address said memory;

e. a segment decoder having its inputs coupled to the data output of said memory and providing its outputs in parallel to all of said plurality of displays;

f. a plurality of anode drivers one being coupled to each of said plurality of displays and enabling their associated display only when activated;

g. a one of n decoder having the output of said address counter as input, and providing activating outputs to said anode drivers;

h. a slow clock;

i. a second AND gate having said slow clock and said second logic output as inputs; and

j. a second counter having said second logic output as a reset input, said second AND gate output as a count input and providing its output as a data input to said memory whereby in the absence of any transistor high output said fast clock will sequence said address counter through each of said plurality of indicators With said one of n decoder simultaneously enabling the associated anode driver of the addressed indicator and in response to an output from a transistor said address counter will be preset to the display associated therewith and said counter will sequentially write the numeral from zero to nine in the addressed location for as long as the transistor is high in response to insertion of a finger in its associated hole thereby allowing the operator to change the setting in a manner analogous to setting a thumbwheel switch.

14. The invention according to claim 13 wherein said first output is in BCD, said address counter and second counter are BCD counters and said segment decoder is a BCD to segment decoder.