LIQUID CRYSTAL DISPLAY SYSTEM WITH INTEGRATED SIGNAL STORAGE CIRCUITRY

• US 3,862,360 A
• Filed: 04/18/1973
• Issued: 01/21/1975
• Est. Priority Date: 04/18/1973
• Status: Expired due to Term

• Current Assignee: Alex M. Leupp, Hans G. Dill, Michael N. Ernstoff, Richard N. Winner, Ronald M. Finnila, William C. Hoffman
• Original Assignee: Alex M. Leupp, Hans G. Dill, Michael N. Ernstoff, Richard N. Winner, Ronald M. Finnila, William C. Hoffman
• Inventors: Ernstoff, Michael N., Dill, Hans G., Finnila, Ronald M., Hoffman, William C., Leupp, Alex M., Winner, Richard N.
• Primary Examiner(s): Griffin, Robert L.
• Assistant Examiner(s): Stellar, George G.
• Application Number:
  US05/352,397
• Time in Patent Office: 643 Days
• Field of Search: 178/7.3D 315/169TV 350/16LC 340/166R
• US Class Current: 348/792
• CPC Class Codes: G02F 1/13394 spacers regularly patterned on the cell subtrate, e.g. walls, pillars G02F1/133377 takes precedence
• CPC Class Codes: G02F 1/136277 formed on a semiconductor substrate, e.g. of silicon
• CPC Class Codes: G02F 2201/123 pixel
• CPC Class Codes: G02F 2203/02 reflective
• CPC Class Codes: G11C 11/22 using ferroelectric elements
• CPC Class Codes: G11C 11/404 with one charge-transfer gate, e.g. MOS transistor, per cell
• CPC Class Codes: H01L 21/00 Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Abstract

Liquid crystal display systems having display panels in which a matrix array of reflective electrodes, as well as the individual addressing circuitry (field effect transistor) and electrical storage circuitry (capacitor) for each cell of the display panel, are formed on semiconductor backplates such that each reflective electrode forms one element or plate of the capacitor for the corresponding cell. Each field effect transistor is utilized to address an associated element of the matrix array, and the associated storage capacitor maintains the applied potential across the liquid crystal cell for a period sufficient for scattering centers to be formed in the liquid crystal material.

Claims

1. A LIQUID CRYSTAL DISPLAY DISPLAY IN RESPONSE TO CONTROL SIGNALS AND VIDEO SIGNALS APPLIED THERETO, SAID DISPLAY PANEL COMPRISING:

A. TRANSPARENT ELECTRODE PLATE ADAPTED FOR BEING BIASED TO A PRESELECTED ELECTRICAL POTENTIAL LEVEL;

A SEMICONDUCTOR BACKPLATE DISPOSED ADJACENT TO AND SPACED APART FROM SAID TRANSPARENT ELECTRODE PLATE;

A QUANTITY OF LIQUID CRYSTAL MATERIAL DISPOSED IN THE SPACING BETWEEN SAID TRANSPARENT ELECTRODE PLATE AND SAID SEMICONDUCTOR BACKPLATE;

A PLURALITY OF SUBSTANTIALLY PARALLEL, EQUALLY SPACED, CONDUCTOR TIVE GATES BUSES ON SAID SURFACE OF SAID SEMICONDUCTOR BACKPLATE WHICH IS NEARER SAID TRANSPARENT ELECTRODE PLATE;

A PLURALITY OF SUBSTANTIALLY PARALLEL, EQUALLY SPACED CONDUCTIVE DRAIN BUSES ON SAID SURFACE OF SAID SEMICONDUCTOR PLATE, SAID DRAIN BUSES BEING ORTHOGONAL TO AND ELECTRICAL CALLY INSULATED FROM SAID GATE BUSES, WHEREBY A CELL AREA IS DEFINED WHERE EACH ADJACENT PAIR OF DRAIN BUSES ARE INTERSECTED BY A PAIR OF ADJECENT GATE BUSES;

AN INSULATION LAYER OVER EACH SAID CELL ARE OF SAID SEMICONDUCTOR BACKPLATE;

SAID REFLECTIVE ELECTRODES BEING DISPOSED ON TOP OF THE SAID REFLECTIVE ELECTRODES BEING DISPOSED ON TOP OF THE INSULATION LAYER FOR EACH OF SAID CELL AREAS SUCH THAT THE COMBINATION OF EACH SAID REFLECTIVE ELECTRODE AND THE CONTIGOUS PORTION OF THE SEMICONDUCTOR BACKPLATE UNDERNEATH SAID INSULATION LAYER POSSESSES ELECTRICAL CHARACTERISTICS ANALOGOUS TO THOSE OF A CAPACITOR;

A PLURALITY OF FIELD EFFECT TRANSISTORS WITH DIFFERENT ONES OF SAID FIELD EFFECT TRANSISTORS BEING DISPOSED IN A PARTICULAR CORNER OF EACH CELL AREA, EACH SAID FIELD EFFECT TRANSISTOR HAVING A GATE ELEMENT DISPOSED BETWEEN A SOURCE ELEMENT AND A DRAIN ELEMENT AND WITH EACH GATE ELEMENT BEING ELECTRICALLY CONNECTED TO THE ADJACENT GATE BUS, EACH DRAIN ELEMENT BEING ELECTRICALLY CONNETED TO THE ADJACENT DRAIN BUS AND EACH SOURCE ELEMENT BEING ELECTRICALLY CONNECTED TO THE REFLECTIVE ELECTRODE OF THE ASSOCIATED CELL AREA;

WHEREBY ALL OF THE GATE ELEMENTS FOR EACH ROW OF SAID CELL AREAS ARE ELECTRICALLY COUPLED TOGETHER AND ALL THE DRAIN ELEMENTS OF ALL SAID CELL AREAS OF EACH COLUMN ARE ELECTRICALLY COUPLED TOGETHER, AND IN RESPONSE TO THE SEQUENTIAL APPLICTION OF CONTROL SIGNALS TO EACH OF SAID GATE BUSES AND TO THE PARALLEL APPLICATION OF SAID VIDEO SIGNALS TO EACH OF SAID DRAIN BUSES, THE POTENTIAL OF EACH REFLECTIVE ELECTRODE MAY BE RAPIDLY PROGRAMMED IN ACCORDANCE WITH A GIVEN PICTORIAL FORMAT.

2. The display panel of claim 1 further comprising an array of doped regions in said semiconductor backplate, with each of said regions disposed underneath of and electrically insulated from a corresponding one of said reflective electrodes, and with each said region being heavily doped with majority carriers;

whereby the combination of each reflective electrode and its associated doped region possesses electrical characteristics analogous to a two plate capacitor.

3. The display panel of claim 1 further comprising an array of doped regions in said semiconductor backplate, with each of said doped regions disposed underneath of and electrically insulated from a corresponding one of said reflective electrodes, and with each said regions being heavily doped with majority carrier ions;

whereby the combination of each reflective electrode and its associated doped region possesses electrical characteristics analogous to a two-plate capacitor.

4. The display panel of claim 1 wherein said reflective electrodes are doped polysilicon electrodes.

5. The display panel of claim 1 further comprising multiplexer means for sequentially applying said control signals to each of said gate electrode buses;

and serial to parallel video converter means for applying video signals to each of said drain buses during each period a control signal is applied to one of said gate electrode buses.

6. The display panel of claim 1 wherein said reflective electrodes are chromium electrodes.