Two level random number generator having a controllable expected value

• US 3,866,029 A
• Filed: 09/18/1973
• Issued: 02/11/1975
• Est. Priority Date: 09/18/1973
• Status: Expired due to Term

• Current Assignee: Paul Chevalier
• Original Assignee: Paul Chevalier
• Inventors: Chevalier, Paul
• Primary Examiner(s): Morrison, Malcolm A.
• Assistant Examiner(s): Malzahn, David H.
• Application Number:
  US05/398,409
• Time in Patent Office: 511 Days
• Field of Search: 235/152,156 331/78
• US Class Current: 708/250
• CPC Class Codes: G06F 7/58 Random or pseudo-random number generators

Abstract

A random number generator for generating a sequence of binary random numbers (Si) whose expected value is controlled by an input digital number x. The random number generator includes a random bit generator which generates at one output a sequence of mutually independent random variables (RBi) such that the probability P(RBi 0) P(RBi 1) 1/2 . Means are further provided to sequentially analyze the sequence of random variables (RBi) and generate a random variable Li which has a probability function given by P(Li k) 2 k where k 1, 2, 3 . . . each time a pattern of the form (1000 . . . 01) containing (k - 1) zero is detected. Means are further provided to set the output random variable Si of the random number generator equal to the bit Xk of x whenever the random variable Li is equal to k, and this for k 1, 2, 3 . . . .

Claims

1. A random number generator for generating a sequence of binary random numbers (Si) whose expected value is controlled by an input digital number x, comprising:

a random bit generator which generates at one output a sequence of mutually independent random variables (RBi) such that the probability P(RBi

     0) P(RBi

     1) 1/2 , means to sequentially analyse the sequence of random variables (RBi) and generate a random variable Li which has a probability function given by;

P(Li k) 2 k where k 1, 2, 3 . . . each time a pattern of the form ( 1,000 . . .

     01) containing (k1) zero is detected, and means to set the output random variable Si of said random number generator equal to the bit Xk of x whenever the random variable Li is equal to k, and this for k 1, 2, 3, . . . .

2. A random number generator as claimed in claim 1 in which there is further provided a second output to indicate if the random variable Si at the output of the random number generator is independent of the previous random variable Si 1.

3. A random number generator as claimed in claim 1 wherein said random bit generator has a flag bit signal (NBi) at another output which indicates if the bit (RBi) at its said one output is independent of the previous bit RBi 1;

said flag signal being utilized to inhibit the sequential processing when it is clear.

4. A random number generator as claimed in claim 1 wherein said means to sequentially analyse the sequence (RBi) is a latch memory circuit fed by a counter, the counter being clear when said bit (RBi) 1 and incremented by one when said bit (RBi) 0, said latch memory circuit being loaded with the contents of said counter when said bit (RBi) 1 and disabled when said bit (RBi) 0.

5. A random number generator as claimed in claim 1 wherein the said means to set the output variable Si equal to the bit Xk of x is a multiplexer circuit controlled by the output Li of a latch memory circuit, said multiplexer having a data input fed by the bits of the word x.

6. A random number generator as claimed in claim 1 wherein said means to sequentially analyse the sequence (RBi) is a counter which is cleared when (RBi) 1 and incremented by one when (RBi) 0, a latch memory circuit is connected to the output of a multiplexer circuit to generate the random variable Si when RBi becomes equal to 1.