Current limit system for DC motor control

• US 3,868,554 A
• Filed: 12/26/1973
• Issued: 02/25/1975
• Est. Priority Date: 12/26/1973
• Status: Expired due to Term

• Current Assignee: Charles Edward Konrad
• Original Assignee: Charles Edward Konrad
• Inventors: Konrad, Charles Edward
• Primary Examiner(s): Dobeck, B.
• Application Number:
  US05/428,022
• Time in Patent Office: 426 Days
• Field of Search: 318/345,334,317,472,434
• US Class Current: 318/434
• CPC Class Codes: B60L 50/52 characterised by DC-motors
• CPC Class Codes: H02P 7/29 using pulse modulation
• CPC Class Codes: Y02T 10/64 Electric machine technologies in electromobility
• CPC Class Codes: Y02T 10/70 Energy storage systems for electromobility, e.g. batteries

Abstract

A current limit system for a DC motor control of the switching regulator or pulse control type which factors in both the markspace ratio of the control, and the actual current through the motor. The maximum allowable motor current is thus controlled as a function of the mark-space ratio of a thyristor coupling the motor to a source of electrical energy. In a preferred embodiment, the maximum allowable current is also varied as a function of thyristor temperature, and an absolute maximum value is established for motor current, which does not vary with operating parameters.

Claims

1. A current limiting system for a pulse controller including solid-state switching means for metering power from a DC source to a DC load comprising:

means for sensing load current and outputting a signal representative thereof;

a gating control for controlling the mark-space ratio of the solid-state switching means as a function of an applied control signal;

a power control circuit for applying a control signal representative of a desired mark-space ratio to said gating control;

a current limit signal stage for producing a current limiting signal which varies as a function of mark-space ratio;

means coupling said power control circuit to said current limit signal stage; and

a current limit detector for receiving signals from said load current sensing means and said current limit signal stage, and for outputting a signal to said power control circuit to regulate the operation thereof.

2. The invention defined in claim 1, further including temperature sensing means disposed in thermal relationship to said solid-state switching means and coupled to said current limit signal stage for varying the output thereof in response to changes in the temperature of said solid state switching means.

3. The invention defined in claim 2, further including a maximum limit signal circuit for producing a second current limit signal representative of a maximum allowable current, and means coupling said second current limit signal to said current limit detector.

4. The invention defined in claim 3, wherein said current limit signal stage produces output signals having a first relationship to control signals in a first range and a second relationship to control signals in a second range.

5. A system for limiting current flowing to a DC load through a pulse control system including a thyristor comprising:

current sensing means coupled in circuit with said DC load for producing a signal representative of load current;

oscillator means for controlling the mark-space ratio of the thyristor as a predetermined function of an applied control signal;

a power control circuit for applying a control signal to said oscillator means;

a current limit signal circuit Coupled to said power control circuit for producing a pilot limiting signal which varies as a function of mark-space ratio;

limit detector means coupled to said current limit signal circuit and to said current sensing means and operative to produce a limit signal in response to the signals received therefrom; and

circuit means for applying the limit signal produced by said limit detector means to said oscillator means.

6. The invention defined in claim 5, further including thermal sensing means disposed in heat conducting relationship to said thyristor and operative to produce a signal representative of the temperature thereof;

and means for coupling said signal to said current limit signal circuit to cause said pilot limiting signal to vary as a partial function of thyristor temperature.

7. The invention defined in claim 6, further including a second current limit signal circuit for producing a signal representative of a maximum allowable current, and means coupling said second current limit signal circuit to said limit detector means.

8. The invention defined in claim 7, wherein said pilot limiting signal varies at a first rate for mark-space ratio below a predetermined value and at a second, lesser rate for mark-space ratios above said predetermined value.

9. The invention defined in claim 5, further including a second current limit signal circuit for producing a signal representative of a maximum allowable current, and means coupling said second current limit signal circuit to said limit detector means.

10. A circuit for limiting current flow in a pulse control system of the type which varies the mark-space ratio of a thyristor for metering power from a DC source to a DC load comprising:

speed control means for producing a speed control signal;

a controlled acceleration circuit responsive to said speed control signal to produce a control signal representative of a desired mark-space ratio;

a gating control responsive to said control signal for repeatedly energizing and commutating the thyristor;

a thermal sensor for producing a signal representative of thyristor temperature;

a limit signal circuit coupled to said controlled acceleration circuit and to said thermal sensor for outputting a limit signal which varies with thyristor temperature and further varies in a first manner with control signals representing mark-space ratios beneath a predetermined value and in a second manner with control signals representing mark-space ratios above said predetermined value;

current sensing means for outputting a signal representative of current flow through the load;

adjustable limit means for producing an invariant signal representative of a maximum allowable load current;

a limit detector circuit comprising comparator means having one input terminal coupled to said current sensing means and another terminal coupled to said limit signal circuit and said adjustable limit means; and

circuit means coupling the output of said limit detector to said controlled acceleration circuit whereby said control signal may be limited for maintaining load current within predetermined limits.