Multiple magnetic alignment of semiconductor devices for bonding

• US 3,868,764 A
• Filed: 11/09/1973
• Issued: 03/04/1975
• Est. Priority Date: 11/09/1973
• Status: Expired due to Term

• Current Assignee: James P. Grabowski, Ronald J. Hartleroad
• Original Assignee: James P. Grabowski, Ronald J. Hartleroad
• Inventors: Hartleroad, Ronald J., Grabowski, James P.
• Primary Examiner(s): Smith, Al Lawrence
• Assistant Examiner(s): Ramsey, K. J.
• Application Number:
  US05/414,273
• Time in Patent Office: 480 Days
• Field of Search: 29/23P,23J,23V,23MM,589,576S,626,628,471.1-3 228/4-6 214/1R,152,1B
• US Class Current: 228/123.1
• CPC Class Codes: B23K 1/012 Soldering with the use of hot gas
• CPC Class Codes: B23K 2101/40 Semiconductor devices
• CPC Class Codes: H01L 21/67144 Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
• CPC Class Codes: Y10T 29/53004 with means to regulate operation by use of templet, tape, card or other replaceable information supply
• CPC Class Codes: Y10T 29/53178 Chip component
• CPC Class Codes: Y10T 29/53196 Means to apply magnetic force directly to position or hold work part

Abstract

A method and apparatus for simultaneously magnetically aligning a plurality of integrally leaded semiconductor device chips with conductive lead frame structures for bonding thereto. The semiconductor device chips having a plurality of soft ferromagnetic integral leads on one face thereof are placed in recesses within one surface of a template which serves as a temporary carrier. The template has soft ferromagnetic cores which extend from each of the recesses to an opposite surface of the template. A conductive lead frame structure is positioned so that sets of soft ferromagnetic finger portions overlie each chip within the template recess. A magnetic force is transmitted through selected cores to raise the chips from the template recess and simultaneously rotate them horizontally into precise aligned engagement with their corresponding fingers so that they can be bonded thereto. In a preferred embodiment, the template includes venting means extending from the recesses to facilitate hot gas flow for bonding the chip to the lead frame finger set.

Claims

1. A self-aligning method of automatically transferring integrally leaded semiconductor device chips to a conductive lead frame structure for permanently bonding thereto, said method comprising:

placing a semiconductor device chip having a face with a plurality of soft ferromagnetic integral leads thereon into a recess in one surface of a template so that said chip face is oriented upwardly, said recess having a bottom portion substantially parallel to said one template surface, said template having a core of soft ferromagnetic material extending from said recess bottom portion to an opposite surface of the template;

positioning a conductive lead frame structure having a soft ferromagnetic convergent cantilevered finger set over said template so that said fingers are spaced above in closely spaced relation with the chip in the template recess;

applying a magnetic force generally perpendicular to the underside of said core to precisely align said integral chip leads with corresponding fIngers of said lead frame and to concurrently magnetically raise the chip from the template recess up to said fingers to produce a precisely aligned engagement between all of the integral chip leads and their corresponding fingers; and

bonding said integral chip leads to said lead frame fingers while the magnetic force is still applied.

2. A self-aligning method of simultaneously automatically transferring a plurality of integrally leaded semiconducotr device chips to conductive lead frame structures for permanently bonding thereto, said method comprising:

placing a semiconductor device chip having a face with a pluality of soft ferromagnetic integral leads thereon into each of a plurality of recesses in one surface of a template so that said chip face of each of the chips therein are oriented upwardly, said recesses being spaced in parallel columns within said one template surface, said recesses having a bottom portion substantially parallel to said one template surface, said template having soft ferromagnetic cores extending from each of said recess bottom portions to an opposite surface of the template;

positioning a conductive lead frame structure having a plurality of sets of soft ferromagnetic convergent cantilevered fingers corresponding to said integral leads on said chip so that a set of fingers overlie in closely spaced relation with each chip in said template recesses;

vibrating said template to prevent the chips from adhering to said template recesses and to bring the integral chip leads within close proximity of their corresponding lead frame fingers;

applying a magnetic force generally perpendicular to the underside of said cores in adjacent recesses to precisely align said integral chip leads of the respective chips with corresponding lead frame fingers and to concurrently magnetically raise said chips from their respective template recesses up to the fingers to produce a precise aligned engagement between all of the integral chip leads of each of the chips and their corresponding lead frame fingers; and

bonding said integral chip leads of the respective chips to their corresponding lead frame fingers while the magnetic force is still applied.

3. A distinctive semiconductor chip carrying template for positioning a plurality of integrally leaded semiconductor chips into spaced relation with an overlying conductive lead frame structure and for facilitating simultaneously aligning the chips through the utilization of a magnetic force, said template comprising a rigid substantially non-ferromagnetic metallic plate, said plate having two major parallel surfaces, a plurality of recesses in one surface thereof, said recesses located in spaced columns and rows therein, said recesses having a bottom portion substantially parallel to said one template surface and having a surface area slightly greater than the surface area of one face of said chip to be placed therein, a plurality of soft ferromagnetic cores, said cores extending from said recess bottom portion to the opposite major surface of said template thereby providing a low reluctance path for a magnetic field to be transmitted through said cores to said chips within said recesses.

4. A distinctive semiconductor device carrying template for positioning integrally leaded semiconductor chips into spaced relation with an overlying lead frame structure prior to bonding so that the chips can be magnetically transferred to and aligned therewith for bonding thereto and providing venting means to facilitate hot gas bonding, said template comprising a rigid, substantially non-ferromagnetic, metallic plate, said plate having two major parallel surfaces, a plurality of recesses in one surface, said recesses located in spaced columns and rows in said one surface, said recesses having a rectangular bottom portion substantially parallel to said one surface, said bottom portion having a surface area slightly greater than the surface area of one major face of said semiconductor chip To be placed therein, said recesses having diverging walls extending from said bottom portion to said one surface, venting means extending from said recesses to the opposite surface of said template providing exhaust ports for permitting hot gas for chip bonding to escape therethrough, and a plurality of soft ferromagnetic cores extending from said bottom portion of said recesses to said opposite surface of said template, said cores permitting a magnetic force applied from said opposite surface to be transmitted therethrough.