SOLID STATE ELECTRONIC CONTROL
First Claim
1. A solid state electronic control for timing and cycling including integrated circuits for timing and frequency division, discrete transistors, solid state diodes, light emitting diode numeric indicators, resistors and capacitors, and an internal power supply including an alternating current source wherein the integrated circuits drive the discrete transistors to control the light emitting diode numeric indicators for time indication, the solid state diode rectify alternating current from the alternating current source to direct current, the resistors limit current, and the capacitors effect filtering and transient suppression to automatically, sequentially time and cycle the actuation of electrically operated remote control valves for distribution of water for the purpose of irrigation, spraying, and humidification of plant materials, said solid state electronic control comprising six sections including a digital readout clock circuit, a calendar circuit, an hours memory circuit, a station output board, the internal power supply, and an external power output circuit in which the digital readout clock circuit is connected to the calendar circuit, the hours memory circuit, and the internal power supply, the station output board is connected to the calendar circuit, the hours memory circuit, and the digital readout clock circuit, and the external power output circuit is connected to the station output board and adapted for connection to remote control valves so that the digital readout clock circuit indicates the hours of a time period and then repeats, the calendar circuit changes indication each 24 hours, indicating days of the week, the hours memory circuit tracks the digital readout, the internal power supply is common to all sections of the control except power output to remote control valves, startup of the station output board is dependent on coincidence of signals obtained from the digital readout clock circuit, the calendar circuit, and the hours memory circuit, and the external power output circuit supplies power to operate remote control valves.
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Accused Products
Abstract
A solid state timing and cycling device utilizing integrated circuits and other discrete solid state components to control the operation of electrically actuated remote control valves for the purpose of automatically programming the operation of all types of systems designed to distribute water for irrigation, spraying, and humidification of plant materials. The control comprises six sections including a digital readout clock circuit, a calendar circuit, an hours memory circuit, a station output board, an internal power supply and an external power output circuit. The internal power supply is common to all sections of the control except power output to the electrically controlled valves in the field and the external power output circuit actuates the electrically operated remote control valves.
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Citations
35 Claims
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1. A solid state electronic control for timing and cycling including integrated circuits for timing and frequency division, discrete transistors, solid state diodes, light emitting diode numeric indicators, resistors and capacitors, and an internal power supply including an alternating current source wherein the integrated circuits drive the discrete transistors to control the light emitting diode numeric indicators for time indication, the solid state diode rectify alternating current from the alternating current source to direct current, the resistors limit current, and the capacitors effect filtering and transient suppression to automatically, sequentially time and cycle the actuation of electrically operated remote control valves for distribution of water for the purpose of irrigation, spraying, and humidification of plant materials, said solid state electronic control comprising six sections including a digital readout clock circuit, a calendar circuit, an hours memory circuit, a station output board, the internal power supply, and an external power output circuit in which the digital readout clock circuit is connected to the calendar circuit, the hours memory circuit, and the internal power supply, the station output board is connected to the calendar circuit, the hours memory circuit, and the digital readout clock circuit, and the external power output circuit is connected to the station output board and adapted for connection to remote control valves so that the digital readout clock circuit indicates the hours of a time period and then repeats, the calendar circuit changes indication each 24 hours, indicating days of the week, the hours memory circuit tracks the digital readout, the internal power supply is common to all sections of the control except power output to remote control valves, startup of the station output board is dependent on coincidence of signals obtained from the digital readout clock circuit, the calendar circuit, and the hours memory circuit, and the external power output circuit supplies power to operate remote control valves.
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2. A solid state electronic control as described in claim 1 in which the digital readout clockcircuit includes an AM-PM indicator circuit.
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3. A solid state electronic control as described in claim 2 in which the internal power supply is common to all sections of the control except the power output to the electrically operated remote control valves and the external power output circuit actuates the electrically operated remote control valves.
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4. A solid state electronic control as described in claim 3 in which the internal power supply includes a source of power, a transformer, and a voltage regulator in which the transformer isolates the source of power from the other sections of the control and the transformer secondary winding is connected to the voltage regulator.
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5. A solid state control as described in claim 4 in which the internal power supply includes two diodes and a filter capacitor in which one diode is connected in each arm of the transformer secondary winding, the filter capacitor is connected between the diodes and the voltage regulator, and the transformer secondary winding and filter capacitor are grounded.
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6. A solid state control as described in claim 4 in which the digital readout clock circuit includes wave shaping and frequency division means to obtain a pulse time base from the line frequency and digital readout means.
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7. A solid state control as described in claim 6 in which the wave shaping means includes a triple line receiver connected to the secondary winding of the internal power supply transformer.
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8. A solid state control as described in claim 7 in which the frequency division means includes first and second divide by six means, first and second divide by 10 means, first and second decade counter means, Schmitt trigger means, divide by six counter means, and multiple binary coded decimal decoder means in which the triple line receiver is connected to the Schmitt trigger means, to the second decade counter means, to at least one of the binary coded decimal decoder means, to the first and the second divide by six means, and to the divide by six counter means, the Schmitt trigger means is connected to the divide by six counter means and the second decade counter means, the first divide by six means is connected to the first divide by 10 means, the first divide by 10 means is connected to the second divide by 10 means, the second divide by 10 means is connected to the second divide by six means, the second decade counter is connected to the divide by six counter and to a binary coded decimal decoder means, and the divide by six counter is connected to the first decade counter means and to multiple binary coded decimal decoder means so that the line frequency is shaped into a square wave by the Schmitt trigger action of the triple line receiver and is fed through the first divide by six to the first divide by 10, to the second divide by 10, to the second divide by six for a total divide by 3600 to obtain a 1 pulse per minute output as a time base for the digital readout clock circuit which is fed to the first decade counter whose output is decoded by a binary coded decimal decoder means, a signal from the first decade counter being fed into the divide by six counter means whose output is decoded by a binary coded decimal decoder means, a signal from the divide by six counter being fed into the second decade counter whose output is decoded by a binary coded decimal decoder means, the Schmitt trigger acting as a data pulse generator to reset the divide by six counter and second decade counter.
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9. A solid state electronic control as described in claim 8 including four digital readout means, one for minutes indication, one for tens of minutes indication, one for hours indication, and one for tens of hours indication.
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10. A solid state electronic control as described in claim 9 in which the digital readout means for tens of hours indication includes B and C segments including transistor and flip flop means to turn the B and C segments of the digital readout means for tens of hours indication on and off.
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11. A solid state electronic control as described in claim 8 in which the AM-PM indicator circuit includes flip flop means in the frequency division means, two NPN transistors, and pilot light indicator means.
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12. A solid state electronic control as described in claim 11 in which the hours memory circuit tracks the digital readout means and includes divide by 12 counter means and one of 16 decoder means in which the divide by 12 counter means receives a signal from the decade counter means of the digital readout clock circuit.
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13. A solid state electronic control as described in claim 12 in which the calendar circuit changes day indication each 24 hours including divide by 16 counter means, one of 16 decoder means, multiple inverter means, multiple solid state switching means, and multiple pilot light indicator means in which the divide by 16 counter means is connected to the second divide by six means of the frequency division means, to the AM-PM indicator circuit flip flop means and to the base electrode of one of the two AM-PM indicator circuit transistors whose collector electrode is connected to one of the two pilot light indicator means whose function is to indicate PM, the one of 16 decoder means is connected to the divide by sixteen counter means and to the multiple inverter means, the multiple inverter means is connected to the multiple solid state switching means, and the multiple solid state switching means is connected to the multiple pilot light indicator means so that the divide by 16 counter means counts the passage of 24 hours, and the binary coded output of the divide by 16 counter means is decoded by the one of 16 decoder means and is inverted by the inverter means and fed to the solid state switching means which activate associated pilot light indicator means to indicate days of the week.
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14. A solid state electronic control as described in claim 13 in which the calendar circuit divide by 16 counter is connected to the calendar circuit one of 16 decoder, the one of 16 decoder is connected between the divide by 16 counter and the inverter means, and the multiple solid state switching means are connected between the inverter means and the pilot light indicator means.
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15. A solid state electronic control as described in claim 14 including switch means connected to the digital readout clock circuit frequency division means said switch means being adjustable to pick up faster pulses allowing for rapid time setting.
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16. A solid state electronic control as described in claim 15 including data collection means for collecting data from the hours memory circuit, the calendar circuit, and the AM-PM indicator circuit and transmitting that data to the station output board.
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17. A solid state electronic control as described in claim 16 in which the data collection means is a three-input NOR gate.
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18. A solid state electronic control as described in claim 17 including switching means between the three-input NOR gate and each of its data inputs.
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19. A solid state electronic control as described in claim 17 in which the station output board includes trigger input means connected to the output of the three-input NOR gate and a number of solid state sequential timers connected to the trigger input means.
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20. A solid state electronic control as described in claim 19 in which the trigger input means is a Schmitt trigger.
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21. A solid state electronic control as described in claim 20 including rectifier means connected between the output from the three-input NOR gate and the Schmitt trigger to prevent reverse flow of current.
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22. A solid state electronic control as described in claim 21 including RC circuit means connected to each sequential timer and trimmer resistor means connected between each sequential timer and its related RC circuit to adjust the on time to compensate for tolerances in the resistance and capacitance of their related RC circuits.
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23. A solid state electronic control as described in claim 22 including multiple relay switching transistor means and multiple relay means in wHich the relay switching transistor means are connected between the sequential timers and the coils of the relay means.
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24. A solid state electronic control as described in claim 23 in which the external power output circuit includes an external power supply and in which the external power supply is connected to one set of the relay contacts.
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25. A solid state electronic control as described in claim 24 including external field valves connected between the external power supply and other relay contacts.
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26. A solid state electronic control as described in claim 25 including switching means and solid state timer means in which the switching means is adjustable to connect the solid state timer with a selected one of the solid state sequential timers to have said sequential timer timed.
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27. A solid state electronic control as described in claim 26 including a second switching means to apply power to the timer and a third switching means to start the timer on time delay.
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28. A solid state electronic control as described in claim 27 including means for bypassing the output of the three-input NOR gate and triggering the Schmitt trigger directly.
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29. A solid state electronic control as described in claim 28 including retriggering means connected to the first sequential timer and switch means connected between the retriggering means and the positive voltage whereby closing the switch means activates the retrigger means and the transfer pulse generated by the shutdown of the first sequential timer will start the retrigger time delay.
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30. A solid state electronic control as described in claim 29 in which the retriggering means is a solid state electronic timer.
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31. A solid state electronic control as described in claim 29 including means for skipping selected alternate sequential timers.
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32. A solid state electronic control as described in claim 31 in which the means for skipping selected alternate sequential timers includes a solid state flip flop, a number of NPN transistors, one connected to each sequential timer, and switching means connected between the flip flop and NPN transistors.
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33. A solid state electronic control as described in claim 32 including external modular timing boards to increase the capacity of the station output board by adding additional sequential timer stations, said external modular timing boards being connected to the means for skipping selected alternate sequential timers.
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34. A solid state electronic control as described in claim 25 including first switching means, second switching means, and retrigger means in which the first switching means is adjustable to connect the retrigger means with a selected one of the solid state sequential timers to pick up trigger pulses from the selected sequential timer, the retrigger means is connected between the first and the second switching means and the second switching means injects retrigger pulses into the selected sequential timer.
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35. A solid state electronic control as described in claim 34 including manual switch means connected to the second switching means to start the output manually at any sequential timer station.
Specification