Brake antilock system with monitor circuitry

• US 3,874,743 A
• Filed: 10/11/1973
• Issued: 04/01/1975
• Est. Priority Date: 11/03/1972
• Status: Expired due to Term

• Current Assignee: Eberhard Schnaibel, Helmut Fleischer
• Original Assignee: Eberhard Schnaibel, Helmut Fleischer
• Inventors: Fleischer, Helmut, Schnaibel, Eberhard
• Primary Examiner(s): Blix, Trygve M.
• Assistant Examiner(s): Kunin, Stephen G.
• Application Number:
  US05/405,555
• Time in Patent Office: 537 Days
• Field of Search: 180/82R 303/21AF 307/1R 317/31,148.5R 324/51 340/52R,52B,248B,248C,253B,253C
• US Class Current: 303/122.05
• CPC Class Codes: B60T 8/885 using electrical circuitry

Abstract

To supervise and monitor proper operation of the various systems and components of a vehicle brake antilock system, trouble signals are generated by separate sensing apparatus which sense, respectively, persistence of signals which should terminate, deviation of wave shape of signals from predetermined wave shapes, such as averaged wave shapes derived from various antilock systems associated with predetermined wheels or axles, presence or absence of signals at certain points, and proper power supply; these malfunction signals are then logically combined with brake operating signals, derived from the brake light switch, to disconnect all, or part of the antilock systems, immediately, or upon termination of braking in case of sensed malfunction.

Claims

1. Vehicle fluid brake antilock system with a monitor and supervisory system and in which the vehicle has a starting switch (58) said system having a supply circuit (29, 65);

a brake command means (10, 11,

     12) and means (27, 28, K28) sensing operation thereof;

electromagnetically controlled pressure and drain valve means (14, 19;

23,

     25) respectively controlling application of pressurized brake fluid to a wheel brake (16, 17,

     18) and drainage of pressurized brake fluid therefrom;

anti-lock circuit means controlling selectively energization of said valve means;

the supervisory and monitor system comprising means (50, 51, 52;

54, 55,

     56) including timing means (50, 51,

     52) associated with and connected to each of the antilock systems associated with separate wheels, or axles of the vehicle, and providing a trouble or malfunction signal upon sensing persistence of energization of the valve means beyond a predetermined duration;

a common trouble signal logic stage (59) and a trouble memory (57) comprising a bistable circuit, the logic stage having a logic circuit (590) connected to and controlled by said separate timing means (50, 51,

     52) and the brake operation sensing means (27, 28;

K28), said logic stage having a transfer function to store the trouble signal until termination of braking, as sensed by the brake operation sensing means, and then providing a disconnect signal;

the starting switch (58) being connected to the set input (S) of the bistable trouble memory circuit (57) to activate the memory upon starting of the vehicle;

connection means (53) connecting said malfunction signal providing means (50, 51, 52, 54, 55,

     56) and the reset input (R) of the trouble memory (57);

the output (K57) of said trouble memory being connected to one input of said common trouble signal logic stage (59,

     590); and

a disconnect circuit means (60, 61;

61a, 61b, 61c) controlled by said disconnect sIgnal, disconnecting connection of said valve means (14, 19;

23,

     25) to the supply circuit (29,

     65).

2. System according to claim 1 wherein said disconnect circuit means includes a disconnect stage (60);

a starting switch (58) for the vehicle is provided, said disconnect stage being activated by said starting switch and being de-activated by said disconnect signal from the logic circuit.

3. System according to claim 2 wherein the disconnect stage comprises a bistable circuit (60), said starting switch (58) being connected to the set input (S) thereof and the disconnect signal derived from said trouble signal logic stage (59, 590) being connected to the reset input (R) of the bistable circuit (60).

4. System according to claim 2 wherein the disconnect circuit means further includes a disconnect relay (61) connected to and controlled by the disconnect stage (60), the controlled switch path (612) of said relay being connected in circuit with said valve means (14, 19;

23,

     25).

5. System according to claim 4 further comprising an alarm indicator (613) connected to and controlled by said disconnect stage (60).

6. System according to claim 2 wherein the disconnect stage (FIG. 7;

60) comprises a disconnect transistor (600), the control relay having its control path (601) connected in series with the emitter-collector path of the disconnect transistor (600) and a switch (603) controlled by said control path (601) and connected to the control path in a self holding circuit.

7. System according to claim 6 further comprising a diode (604) connected between the control path (601) of the control relay and the starting switch (58) of the vehicle.

8. System according to claim 6 wherein the base of the disconnect transistor (600) is connected and controlled by the output of the common trouble signal logic stage (59).

9. System according to claim 6, wherein a disconnect relay (611, 612) is provided having its switching path (612) connected in series between the energization circuit for the electromagnetic valve means (14, 23;

19,

     25) and its control path (611) connected in the switching circuit (603) of the control relay (601), said connection being a fail-safe connection and providing for energization of the control relay (601) affecting energization of the control path (611) of the disconnect relay and thus permit energization of said electromagnetic valve means only when the disconnect relay is not disabled.

10. System according to claim 9 wherein the switch (603) of the control relay is a transfer switch;

an alarm means (613) is provided, said alarm means being connected to the terminal of said control relay which is connected when the relay is de-energized to provide an alarm upon de-energization of the control relay and indicative of malfunction of the brake antilock system.

11. System according to claim 2 wherein the disconnect stage (60) has complementary outputs (Q1, Q2), one of said outputs (Q1) being energized upon said stage receiving a signal from said starting switch (58);

a warning indicator (613) is provided, said warning indicator being energized a. upon energization of said supply circuit and before said signal from said starting switch is received to provide an indication of operability of the warning indicator; and

b. upon change of state of said disconnect stage due to transfer of a trouble signal from said trouble signal logic circuit (59).

12. System according to claim 1 wherein the brake antilock systems of the vehicle wheels, or axles, have individual, independent tachometer generator stages (31, 32) having speed signal outputs (K321-K324);

and wherein the trouble signal providing means includes a tachometer monitor stage (54), connected to said speed signal terminals and providing a speed trouble signal at an output terminal (K54) of said monitor stage if a selected characteristic of the speed signal of any one of said tachometer generator stages deviates from a predeTermined characteristic; and

means (53,

     57) connected to and applying said speed trouble signal to an input of said common trouble signal logic stage (59,

     590).

13. System according to claim 12 wherein the predetermined characteristic is the average of the instantaneous rates of change of speed signal derived from all the tachometer generators, and a selected characteristic is an excessive variation of said rate of change of any one of the speed signals with respect to said average.

14. System according to claim 12 wherein the tachometer generator monitor stage (FIG. 4:

54) comprises a differentiator (70) and a threshold switch (71) and separate resistors (66-69) connected to the speed signals delivered from the individual wheels or axles connecting the signals, in addition, to said differentiator stage (71).

15. System according to claim 14 further comprising a coupling capacitor (717) coupling the differentiator to the threshold switch to transfer only signals representative of speed changes.

16. System according to claim 1 wherein the brake antilock systems of the vehicle wheels, or axles, have individual control memory elements (44) sensing first response of the antilock system associated with a respective wheel, or axle, and providing control signals to the valve means to control, selectively, energization thereof and hence cyclical operation of the antilock systems until reset upon release of the brake command means, as sensed by said brake operation sensing means (27, 28, K28);

and wherein the trouble signal providing means (50, 51, 52, 54, 55,

     56) includes a memory monitor stage (55,

     56) for at least one of said memory elements, connected to and controlled by the respective memory element (44) and the brake command sensing means (28), and providing a memory trouble signal at the output (K55, K56) thereof if the memory element of the respective antilock system does not reset upon termination of operation of the brake command means (10, 11,

     12); and

means (53,

     57) connected to and applying said memory trouble signal to an input of said common trouble signal logic stage (59,

     590).

17. System according to claim 16 wherein the memory monitor stage (FIG. 5:

55,

     56) comprises a conjunctive input gate (550,

     551) and providing said memory trouble signal if the memory element has not reset upon termination of a brake command signal transmitted by said brake command sensing means (28).

18. System according to claim 17 further comprising signal delay means (553) in the monitor stage to delay the signals applied to the input thereof and thereby prevent interference between signals from the brake command sensing means (28) and the control memory (44).

19. System according to claim 1 wherein said trouble signal providing means comprises a tachometer generator monitor stage (54) providing a speed trouble signal at an output (K54) thereof, and connected to said connection means (53) to control the rest input (R) of the trouble memory (57);

a control memory monitor stage (55,

     56) and providing a memory trouble signal at the output (K55, K56) thereof and connected to said connection means (53) to control the reset input (R) of the trouble memory (57).

20. System according to claim 19 wherein said brake antilock system of the vehicle has means (39) sensing vehicle speed connected to and controlled by the plurality of wheels of the vehicles, and wherein the output of said trouble memory (57) is connected to said speed sensing means (39) to disable said sensing means upon having a trouble signal from said connection means applied thereto.

21. System according to claim 20 wherein the vehicle speed sensing means (FIG. 8:

39) includes a capacitor (390) connected to be charged to a voltage simulating vehicle speed;

a disabling stage (73) connected to selectively shunt said capacitor (390) said disabling stage, upon shunting of a capacitor, providing an output signal at the output terminal thereof representative of zero vehicle speEd.

22. System according to claim 1 wherein a voltage monitor stage (62) is provided, connected to and controlled by the supply circuit (29, 65) and providing a power trouble signal in case of deviation of voltage of the supply circuit from a predetermined value or range of values at an output terminal (K62) thereof;

said output terminal (K62) being connected to control disconnect circuit (60, 61;

61a -61c) upon such deviation.

23. System according to claim 22 wherein the supply circuit (29, 65) further comprises a regulated voltage supply bus (64);

and wherein a reference voltage generator (63) is provided, connected to the supply circuit (29,

     65) and providing a reference voltage independent of the regulated voltage, said supply circuit (29,

     65) also being connected to energize the electromagnetic valve means (14, 23;

19,

     25), if controlled to be energized; and

the voltage monitor circuit (62) is connected to the regulated voltage supply bus (64) and the reference voltage generator (63).

24. System according to claim 23 wherein the reference voltage generator (FIG. 6:

63) comprises a series circuit including a Zener diode (632) and a resistor (631) connected across the supply circuit (29,

     65).

25. System according to claim 23 wherein the voltage monitor stage (FIG. 6:

62) comprises two transistors (620,

     621) having a common collector resistor (622) connected to both collectors of the transistors;

one transistor (620) having its emitter connected to the regulated voltage (64) and the other transistor (621) having its emitter connected to the reference voltage;

the one transistor (620) having its base connected to the reference voltage and the other transistor (621) having its base connected to the regulated voltage.

26. System according to claim 25 wherein the output terminal (K62) is connected to the common collector resistor (622);

and a delay circuit (62a) including a delay capacitor (629) connected between the collector resistor and the output terminal (K62).

27. System according to claim 22 wherein the trouble signal logic stage (FIG. 7:

59) comprises a gate (590) having an OR function and including two diodes (595,

     596);

a transistor (591) connected to short circuit the output of the OR gate upon conduction thereof, the base of the transistor being connected to said voltage monitor stage (62) if the output terminal (K62) is energized upon sensing of said deviation by the voltage monitor stage and to then, short circuit the OR gate.

28. System according to claim 1 further comprising means (47, 48, 49) disjunctively connecting the electromagnetic valve means associated with the respective ones of the respective wheels, or axles to the inputs of the respective timing means (50, 51, 52), said respective timing means starting a timing period upon first energization of any one of said valve means associated with a respective wheel brake.

29. System according to claim 28 wherein the respective timing means (FIG. 3:

50, 51,

     52) each include a storage capacitor (506);

means (504) slowly charging said capacitor upon first sensing energization of any one of the valve means to thereby initiate a timing interval; and

means (505,

     473) rapidly discharging said capacitor upon de-energization of both said pressure and drain valve means.

30. System according to claim 1 wherein the trouble memory (FIG. 7:

57) comprises an input stage (72) including a storage capacitor (723), the input stage being activated upon energization of the starting switch (58) to hold the energization and to activate the entire supervisory and monitor system.

31. System according to claim 1 wherein the trouble signal logic circuit (FIG. 7:

59) comprises a disjunctive gate (590).

32. System according to claim 31 wherein the trouble signal logic gate comprises a gate having an OR function (590) and including two diodes 595, 596.

33. System according to claim 1 wherein the disconneCt circuit means (60) includes a disconnect stage (60) and a plurality of disconnect relays (FIG. 9:

61a, 61b, 61c;

611a, 611b, 611c) for the individual antilock systems;

AND gates (75, 77,

     79) for the individual antilock systems having one input connected to the trouble or malfunction signal providing means (50, 51, 52;

54, 55,

     56) associated with a respective specific individual brake antilock system and having their outputs connected to the respective one of the plurality of disconnect relays associated with a specific individual brake antilock system, said AND gates (75, 77,

     79) bridging said common trouble signal logic stage (59) to control the disconnect relay already in advance of the trouble signal logic stage (59).

34. System according to claim 33 further comprising a starting switch (58) for the vehicle;

a trouble memory circuit (57) connected to the starting switch and to said common trouble signal logic stage and activated upon operation of the starting switch, and de-activated upon sensing a signal being applied to said common trouble signal logic stage, said trouble memory circuit (57) having an output connected to another input of the AND gates (75, 77,

     79) upon being de-activated.

35. System according to claim 34 further comprising controlled switches (74, 76, 78) in series with the circuit connecting the individual trouble or malfunction signal providing means (50, 51, 52) and respective AND gates (75, 77, 79), the state of said controlled switches being controlled by the energization of the specific one of the plurality of disconnect relays which are associated with specific brake antilock systems.

36. System according to claim 35 wherein each of the disconnect relays (FIG. 10:

61a, 61b, 61c) comprises an individual transistor (615a, 615b, 615c), said transistors being commonly energized (603) by said disconnect stage (60) if said disconnect stage is energized; and

individual relay means (611a, 611b, 611c) connected in series with the emitter-collector paths of the individual transistors, conduction of said individual transistors being separately controlled by conduction of the respective AND gate (75, 77,

     79).

37. System according to claim 36 wherein the relay means comprises a relay winding (611a, 611b, 611c) and the respective AND gates (75, 77, 79) are connected to the bases of the respective transistors (615a-615c).

38. System according to claim 35 wherein each AND gate (75, 77, 79) has two inputs, one input comprising a diode (751) and the other input comprising a switching transistor (740), said transistor simultaneously forming said controlled switch;

and means connecting the base of the switching transistor (740) to the junction of the emitter-collector path of the individual transistor (6515a-615c) and the individual relay means (611a-611c) of the associated disconnect relay (61a-61c).

39. System according to claim 34 wherein each AND gate (75, 77, 79) has two inputs, one input comprising a diode (751) and the other input comprising a transistor (740).

40. System according to claim 1 further comprising a power amplifier (80) is series with the control windings (23, 25) of the valve means (14, 23;

19,

     25), said amplifier including a power transistor (800) connected in series with the disconnect circuit (612a-612c) of the associated disconnect relay (61;

61a-61c).

41. System according to claim 40 wherein the collector of the power transistor (800) is connected to one terminal (29) of the supply circuit;

the emitter is connected to a terminal of the respective associated control winding (23,

     25) of the respective valve means (14,

     19), the other terminal of said valve means being connected to the other terminal (65) of the supply circuit; and

a resistor (803) having a resistance which is high with respect tO the resistance of the emitter-collector path when said transistor is conductive connected between the emitter and said one terminal (29) of the supply circuit; and

means connecting the junction of said resistor (806) and the emitter of said transistor (800) to said trouble or malfunction sensing means to provide a valve malfunction signal thereto at a voltage level of said one terminal of the supply circuit if continuity of the electrical circuit between the emitter and through the respective control winding (23,

     25) of the associated valve means to the other terminal of the source (65) should be interrupted.

42. In a vehicle having individual, separate electrically controlled brake antilock systems associated with respective wheels, or axles of the vehicle, and having electrical components therein at which predetermined electrical signals arise during connection of the system and during operation thereof, a fail-safe trouble and malfunction sensing and system disconnect arrangement comprising at least one of means (50, 51, 52) connected to first selected ones of said components in the individual systems, sensing persistence of the signals thereat in excess of a predetermined time, and providing individual time malfunction signals;

means (54) connected to second selected ones of said components in the individual systems, sensing deviation of wave shape thereat from a predetermined wave shape, and providing at least one wave shape malfunction signal;

means (55,

     56) connected to third selected ones of said components in the individual systems, sensing deviation of occurrence, or non-occurrence of signals from that which would arise upon proper operation of the system, and providing at least one logic malfunction signal;

means (62) connected to the system sensing deviation of characteristics of the power supply from that which would arise upon proper operation of the system, and providing a power malfunction signal;

disconnect means (60,

     61) disabling said system; and

means (53, 57,

     59) logically combining at least two of said malfunction signals and providing a disconnect signal, said disconnect signal being connected to said disconnect means to disable at least one of said systems when at least one malfunction signal has been received, as sensed by at least one of said malfunction means.

43. In the vehicle of claim 42, a brake operating means, and means (28) sensing operation of the brake and providing a brake operation signal upon operation of the brake, wherein said brake operation signal is connected to said logical combining means (53, 57, 59), said brake operation signal maintaining said systems in operation for the duration of brake operation, upon sensing of malfunction, and overriding said malfunction signals, except the power malfunction signal, said disconnect means being enabled upon termination of said brake operation signal, unless the malfunction signal was the power malfunction signal.

44. In the vehicle of claim 42, said power malfunction signal being connected directly to said disconnect means to immediately disable said systems.

45. In the vehicle of claim 42, said disconnect means disabling all said systems simultaneously.

46. In the vehicle of claim 42, said disconnect means comprising means (61a, 61b, 61c) selectively disconnecting the individual separate systems;

and said logical combining means comprising means (75, 77,

     79) responsive to predetermined ones of said malfunction signals providing individual disconnect signals to disable only that system from which a trouble signal has been sensed, and means (57, 59,

     60) to disable all said systems upon sensing of a power malfunction signal.