Exponent indicating system

• US 3,878,380 A
• Filed: 10/04/1973
• Issued: 04/15/1975
• Est. Priority Date: 10/04/1972
• Status: Expired due to Term

• Current Assignee: Takao Tsuiki
• Original Assignee: Takao Tsuiki
• Inventors: Tsuiki, Takao
• Primary Examiner(s): Morrison, Malcolm A.
• Assistant Examiner(s): Malzahn, David H.
• Application Number:
  US05/403,442
• Time in Patent Office: 558 Days
• Field of Search: 235/156,159,160,164,152 340/172.5,324R
• US Class Current: 708/171
• CPC Class Codes: G06F 3/1407 General aspects irrespective of display type, e.g. determination of decimal point position, display with fixed or driving decimal point, suppression of non-significant zeros

Abstract

An exponent indicating system for use in the display of an electronic calculator or the like, which comprises a decimal point register having memory places in excess of the effective indication or calculation places of the display. Using the excessive places, an exponent is indicated so as to show the approximate figures of a number having more places than the effective indication or calculation places.

Claims

1. An exponent indicating system for use with a numerical display device having a plurality of display positions, a decimal point indicator element for each position and an exponent indicator element, said system comprising a decimal point shift register having a number of stages which exceeds the number of display positions of said display device for storing the position of a decimal point of a number, an exponent indicator driver circuit connected to said exponent indicator element, first means connected to the output of said register for detecting the relative position of said decimal point with respect to the number of display positions in said display device, and second means connected to said register and said first gating means for actuating said exponent indicator driver circuit in dependence on the position of said decimal point in said number.

2. An exponent indicating system as defined in claim 1, wherein said first means includes a first AND gate having one input connected to the output of said register and clock means for applying a periodic clock pulse to a second input of said AND gate, said clock pulse having a duration equal to the shifting time of a number of stages of said register equal to the number of display positions of said display device.

3. An exponent indicating system as defined in claim 2, wherein said second means includes a second AND gate having one input connected to the output of said register and a second input connected to the output of said first AND gate, the output of said second AND gate being connected to said exponent indicator driver circuit.

4. An exponent indicating system as defined in claim 3, further including a decimal point driver circuit connected to said decimal point indicator elements, and wherein said second means further includes a third AND gate having one input connected to the output of said register and an inverter circuit connecting the output of said first AND gate to a second input of said third AND gate, the output of said third AND gate being connected to said decimal point driver circuit.

5. An exponent indicating system as defined in claim 3, wherein said shift register has a number of stages equal to twice the number of display positions of said display device.

6. An exponent indicating system as defined in claim 3, wherein said first means further includes first and second flip-flops connected in tandem between the output of said first AND gate and the input to said second AND gate.

7. An exponent indicating system as defined in claim 6, further including a decimal point driver circuit connected to said decimal point indicator elements, and wherein said second means further includes a third AND gate having one input connected to the output of said register and an inverter circuit connecting the output of said second flip-flop to a second input of said third AND gate, the output of said third AND gate being connected to said decimal point driver circuit.

8. An exponent indicating system as defined in claim 7, wherein said second means further includes a fourth AND gate having one input connected to the output of said second flip-flop and a second input receiving a timing pulse, and an OR gate having inputs connected to the outputs of said third and fourth AND gates and an output connected to said decimal point driver circuit.

9. An exponent indicating system for use with a numerical display device having a plurality of display positions, a decimal point indicator element for each position and an exponent indicator element, said system comprising a decimal point shift register having a number of stages which exceeds the number of display positions of said display device for storing the position of a decimal point of a number, an exponent indicator driver circuit connected to said exponent indicator element, first means connected to the output of said register for detecting the relative position of said decimal point with respect to the number of display positions in said display device, second means connected to said register for actuating said exponent indicator driver circuit in dependence on the position of said decimal point in said number, and a decimal point driver circuit responsive to said first means for actuating said decimal point indicator elements.

10. An exponent indicating system as defined in claim 9, wherein said shift register comprises first and second shift register portions connected in tandem and each portion having a number of stages equal to the number of display positions of said display device.

11. An exponent indicating system as defined in claim 10, wherein said second means includes a second shift register corresponding to the decimal point shift register, a plurality of OR gates corresponding to the respective stages of said second shift register portion and each having inputs connected to the respective outputs of each stage of said second shift register portion of equal or lower order, and a plurality of AND gates connecting the outputs of the respective OR gates to the inputs to respective stages of said second shift register, the output of said second shift register being connected to said exponent indicator driver circuit.

12. An exponent indicating system as defined in claim 9, wherein said second means includes a first AND gate having one input connected to the output of said register and clock means for applying a periodic clock pulse to a second input of said AND gate, said clock pulse having a duration equal to the shifting time of a number of stages of said register equal to the number of display positions of said display device.

13. An exponent indicating system as defined in claim 12, wherein said second means includes first and second flip-flops connected in tandem between output of said first AND gate and said exponent indicator driver circuit.

14. An exponent indicating system as defined in claim 13, wherein said shift register is made up of first and second shift register portions connected in tandem and each having a number of stages exceeding the number of display positions of said display device.

15. An exponent indicating system as defined in claim 14, wherein said first means includes a first OR gate having inputs connected to the respective outputs of said shift register positions and means connecting the output of said first OR gate to said decimal point driver circuit.

16. An exponent indicating system as defined in claim 14, wherein said first means further includes a first OR gate Having inputs connected to the respective outputs of said shift register portions, a second OR gate having respective inputs connected to intermediate points of said first and second shift register portions, second and third AND gates having first inputs connected respectively to the outputs of said first and second OR gates, inverter means for applying to a second input of said first OR gate the inverted output of said second flip-flop, a second input of said second OR gate being connected directly to the output of said second flip-flop, and a third OR gate receiving the outputs of said second and third AND gates and having its output connected to said decimal point driver circuit.